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authorWill Deacon <will.deacon@arm.com>2011-07-19 17:17:48 -0400
committerWill Deacon <will.deacon@arm.com>2011-08-31 05:18:00 -0400
commit25e29c7c0f4fcbe911b77a69f015bd6424cedcd0 (patch)
tree5055018f21809859c9f008ac586507e83fdb34bb /arch/arm/kernel/perf_event_v7.c
parent6330aae7dcd54df893813392e310141be7aa5323 (diff)
ARM: perf: use integers for ARMv7 event indices
This patch ensures that integers are used to represent event indices in the ARMv7 PMU backend. This ensures consistency between functions and also with the arm_pmu structure. Acked-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel/perf_event_v7.c')
-rw-r--r--arch/arm/kernel/perf_event_v7.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index f4f260dabee3..e39bc8935cbe 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -793,7 +793,7 @@ static inline int armv7_pmnc_counter_has_overflowed(u32 pmnc,
793 return ret; 793 return ret;
794} 794}
795 795
796static inline int armv7_pmnc_select_counter(unsigned int idx) 796static inline int armv7_pmnc_select_counter(int idx)
797{ 797{
798 u32 val; 798 u32 val;
799 799
@@ -840,7 +840,7 @@ static inline void armv7pmu_write_counter(int idx, u32 value)
840 smp_processor_id(), idx); 840 smp_processor_id(), idx);
841} 841}
842 842
843static inline void armv7_pmnc_write_evtsel(unsigned int idx, u32 val) 843static inline void armv7_pmnc_write_evtsel(int idx, u32 val)
844{ 844{
845 if (armv7_pmnc_select_counter(idx) == idx) { 845 if (armv7_pmnc_select_counter(idx) == idx) {
846 val &= ARMV7_EVTSEL_MASK; 846 val &= ARMV7_EVTSEL_MASK;
@@ -848,7 +848,7 @@ static inline void armv7_pmnc_write_evtsel(unsigned int idx, u32 val)
848 } 848 }
849} 849}
850 850
851static inline u32 armv7_pmnc_enable_counter(unsigned int idx) 851static inline int armv7_pmnc_enable_counter(int idx)
852{ 852{
853 u32 val; 853 u32 val;
854 854
@@ -869,7 +869,7 @@ static inline u32 armv7_pmnc_enable_counter(unsigned int idx)
869 return idx; 869 return idx;
870} 870}
871 871
872static inline u32 armv7_pmnc_disable_counter(unsigned int idx) 872static inline int armv7_pmnc_disable_counter(int idx)
873{ 873{
874 u32 val; 874 u32 val;
875 875
@@ -891,7 +891,7 @@ static inline u32 armv7_pmnc_disable_counter(unsigned int idx)
891 return idx; 891 return idx;
892} 892}
893 893
894static inline u32 armv7_pmnc_enable_intens(unsigned int idx) 894static inline int armv7_pmnc_enable_intens(int idx)
895{ 895{
896 u32 val; 896 u32 val;
897 897
@@ -912,7 +912,7 @@ static inline u32 armv7_pmnc_enable_intens(unsigned int idx)
912 return idx; 912 return idx;
913} 913}
914 914
915static inline u32 armv7_pmnc_disable_intens(unsigned int idx) 915static inline int armv7_pmnc_disable_intens(int idx)
916{ 916{
917 u32 val; 917 u32 val;
918 918