ARM: perf: add support for the Cortex-A15 PMU

This patch adds support for the Cortex-A15 PMU to the ARMv7
perf-event backend.

Signed-off-by: Will Deacon <will.deacon@arm.com>

1 files changed, 3 insertions, 0 deletions

diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index df4e517687bf..262ea67f60ae 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -663,6 +663,9 @@ init_hw_perf_events(void)
                 case 0xC050:    /* Cortex-A5 */
                         armpmu = armv7_a5_pmu_init();
                         break;
+                case 0xC0F0:    /* Cortex-A15 */
+                        armpmu = armv7_a15_pmu_init();
+                        break;
                 }
         /* Intel CPUs [xscale]. */
         } else if (0x69 == implementor) {