diff options
author | Mark Rutland <mark.rutland@arm.com> | 2011-07-19 04:37:10 -0400 |
---|---|---|
committer | Will Deacon <will.deacon@arm.com> | 2011-08-31 05:50:02 -0400 |
commit | c47f8684baefa2bf52c4320f894e73db08dc8a0a (patch) | |
tree | 685df6d09e03620e12d50c31cbf20e69b9e6ee32 /arch/arm/kernel/perf_event.c | |
parent | 7b9f72c62ed047a200b1ef8c70bee0b58e880af8 (diff) |
ARM: perf: remove active_mask
Currently, pmu_hw_events::active_mask is used to keep track of which
events are active in hardware. As we can stop counters and their
interrupts, this is unnecessary.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Ashwin Chaugule <ashwinc@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel/perf_event.c')
-rw-r--r-- | arch/arm/kernel/perf_event.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index dfde9283aec1..438482ff7498 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c | |||
@@ -57,12 +57,6 @@ struct cpu_hw_events { | |||
57 | * an event. A 0 means that the counter can be used. | 57 | * an event. A 0 means that the counter can be used. |
58 | */ | 58 | */ |
59 | unsigned long used_mask[BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)]; | 59 | unsigned long used_mask[BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)]; |
60 | |||
61 | /* | ||
62 | * A 1 bit for an index indicates that the counter is actively being | ||
63 | * used. | ||
64 | */ | ||
65 | unsigned long active_mask[BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)]; | ||
66 | }; | 60 | }; |
67 | static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events); | 61 | static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events); |
68 | 62 | ||
@@ -295,7 +289,6 @@ armpmu_del(struct perf_event *event, int flags) | |||
295 | 289 | ||
296 | WARN_ON(idx < 0); | 290 | WARN_ON(idx < 0); |
297 | 291 | ||
298 | clear_bit(idx, cpuc->active_mask); | ||
299 | armpmu_stop(event, PERF_EF_UPDATE); | 292 | armpmu_stop(event, PERF_EF_UPDATE); |
300 | cpuc->events[idx] = NULL; | 293 | cpuc->events[idx] = NULL; |
301 | clear_bit(idx, cpuc->used_mask); | 294 | clear_bit(idx, cpuc->used_mask); |
@@ -327,7 +320,6 @@ armpmu_add(struct perf_event *event, int flags) | |||
327 | event->hw.idx = idx; | 320 | event->hw.idx = idx; |
328 | armpmu->disable(hwc, idx); | 321 | armpmu->disable(hwc, idx); |
329 | cpuc->events[idx] = event; | 322 | cpuc->events[idx] = event; |
330 | set_bit(idx, cpuc->active_mask); | ||
331 | 323 | ||
332 | hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE; | 324 | hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE; |
333 | if (flags & PERF_EF_START) | 325 | if (flags & PERF_EF_START) |