diff options
author | Jon Medhurst <tixy@yxit.co.uk> | 2011-06-09 12:35:36 -0400 |
---|---|---|
committer | Tixy <tixy@medhuaa1.miniserver.com> | 2011-07-13 13:32:48 -0400 |
commit | 9f596e51261f96d602aa4eaf6db7f12ce53260d6 (patch) | |
tree | b10f381513b0c5d1c4f7269adfa3de4d3d56447b /arch/arm/kernel/kprobes-arm.c | |
parent | 7be7ee2d295f6a069e1e92db95bf92eea2a173cf (diff) |
ARM: kprobes: Add emulate_rd12rn16rm0rs8_rwflags()
This is the emulation function for the instruction format used by the
ARM data-processing instructions.
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Diffstat (limited to 'arch/arm/kernel/kprobes-arm.c')
-rw-r--r-- | arch/arm/kernel/kprobes-arm.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/kernel/kprobes-arm.c b/arch/arm/kernel/kprobes-arm.c index 80a941100f8c..6e38bd4f7efd 100644 --- a/arch/arm/kernel/kprobes-arm.c +++ b/arch/arm/kernel/kprobes-arm.c | |||
@@ -893,6 +893,41 @@ prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn, | |||
893 | return INSN_GOOD; | 893 | return INSN_GOOD; |
894 | } | 894 | } |
895 | 895 | ||
896 | static void __kprobes | ||
897 | emulate_rd12rn16rm0rs8_rwflags(struct kprobe *p, struct pt_regs *regs) | ||
898 | { | ||
899 | kprobe_opcode_t insn = p->opcode; | ||
900 | unsigned long pc = (unsigned long)p->addr + 8; | ||
901 | int rd = (insn >> 12) & 0xf; | ||
902 | int rn = (insn >> 16) & 0xf; | ||
903 | int rm = insn & 0xf; | ||
904 | int rs = (insn >> 8) & 0xf; | ||
905 | |||
906 | register unsigned long rdv asm("r0") = regs->uregs[rd]; | ||
907 | register unsigned long rnv asm("r2") = (rn == 15) ? pc | ||
908 | : regs->uregs[rn]; | ||
909 | register unsigned long rmv asm("r3") = (rm == 15) ? pc | ||
910 | : regs->uregs[rm]; | ||
911 | register unsigned long rsv asm("r1") = regs->uregs[rs]; | ||
912 | unsigned long cpsr = regs->ARM_cpsr; | ||
913 | |||
914 | __asm__ __volatile__ ( | ||
915 | "msr cpsr_fs, %[cpsr] \n\t" | ||
916 | BLX("%[fn]") | ||
917 | "mrs %[cpsr], cpsr \n\t" | ||
918 | : "=r" (rdv), [cpsr] "=r" (cpsr) | ||
919 | : "0" (rdv), "r" (rnv), "r" (rmv), "r" (rsv), | ||
920 | "1" (cpsr), [fn] "r" (p->ainsn.insn_fn) | ||
921 | : "lr", "memory", "cc" | ||
922 | ); | ||
923 | |||
924 | if (rd == 15) | ||
925 | alu_write_pc(rdv, regs); | ||
926 | else | ||
927 | regs->uregs[rd] = rdv; | ||
928 | regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); | ||
929 | } | ||
930 | |||
896 | /* | 931 | /* |
897 | * For the instruction masking and comparisons in all the "space_*" | 932 | * For the instruction masking and comparisons in all the "space_*" |
898 | * functions below, Do _not_ rearrange the order of tests unless | 933 | * functions below, Do _not_ rearrange the order of tests unless |