diff options
author | Russell King <rmk+lkml@arm.linux.org.uk> | 2006-01-08 04:02:07 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-08 23:13:46 -0500 |
commit | 9ded96f24c3a5fcbef954e88c443385a1af37eb9 (patch) | |
tree | 49f43337e2b8d63a5a28402a15d99fe27d8d2a1c /arch/arm/kernel/irq.c | |
parent | 705b6c7b34f2621f95f606d0e683daa10cdb8eb9 (diff) |
[PATCH] IRQ type flags
Some ARM platforms have the ability to program the interrupt controller to
detect various interrupt edges and/or levels. For some platforms, this is
critical to setup correctly, particularly those which the setting is dependent
on the device.
Currently, ARM drivers do (eg) the following:
err = request_irq(irq, ...);
set_irq_type(irq, IRQT_RISING);
However, if the interrupt has previously been programmed to be level sensitive
(for whatever reason) then this will cause an interrupt storm.
Hence, if we combine set_irq_type() with request_irq(), we can then safely set
the type prior to unmasking the interrupt. The unfortunate problem is that in
order to support this, these flags need to be visible outside of the ARM
architecture - drivers such as smc91x need these flags and they're
cross-architecture.
Finally, the SA_TRIGGER_* flag passed to request_irq() should reflect the
property that the device would like. The IRQ controller code should do its
best to select the most appropriate supported mode.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/arm/kernel/irq.c')
-rw-r--r-- | arch/arm/kernel/irq.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 869c466e6258..b5645c4462cf 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c | |||
@@ -684,8 +684,12 @@ int setup_irq(unsigned int irq, struct irqaction *new) | |||
684 | spin_lock_irqsave(&irq_controller_lock, flags); | 684 | spin_lock_irqsave(&irq_controller_lock, flags); |
685 | p = &desc->action; | 685 | p = &desc->action; |
686 | if ((old = *p) != NULL) { | 686 | if ((old = *p) != NULL) { |
687 | /* Can't share interrupts unless both agree to */ | 687 | /* |
688 | if (!(old->flags & new->flags & SA_SHIRQ)) { | 688 | * Can't share interrupts unless both agree to and are |
689 | * the same type. | ||
690 | */ | ||
691 | if (!(old->flags & new->flags & SA_SHIRQ) || | ||
692 | (~old->flags & new->flags) & SA_TRIGGER_MASK) { | ||
689 | spin_unlock_irqrestore(&irq_controller_lock, flags); | 693 | spin_unlock_irqrestore(&irq_controller_lock, flags); |
690 | return -EBUSY; | 694 | return -EBUSY; |
691 | } | 695 | } |
@@ -705,6 +709,12 @@ int setup_irq(unsigned int irq, struct irqaction *new) | |||
705 | desc->running = 0; | 709 | desc->running = 0; |
706 | desc->pending = 0; | 710 | desc->pending = 0; |
707 | desc->disable_depth = 1; | 711 | desc->disable_depth = 1; |
712 | |||
713 | if (new->flags & SA_TRIGGER_MASK) { | ||
714 | unsigned int type = new->flags & SA_TRIGGER_MASK; | ||
715 | desc->chip->set_type(irq, type); | ||
716 | } | ||
717 | |||
708 | if (!desc->noautoenable) { | 718 | if (!desc->noautoenable) { |
709 | desc->disable_depth = 0; | 719 | desc->disable_depth = 0; |
710 | desc->chip->unmask(irq); | 720 | desc->chip->unmask(irq); |