diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2011-02-16 04:36:05 -0500 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2011-02-16 04:44:30 -0500 |
commit | 9035a97a32836d0e456ddafaaf249a844e6e4b5e (patch) | |
tree | 41ec3db083bdb46cd831f0d39db1fe294ae7d55f /arch/arm/kernel/hw_breakpoint.c | |
parent | fe16d949b45036d9f80e20e07bde1ddacc930b10 (diff) | |
parent | 452858338aec31c1f4414bf07f31663690479869 (diff) |
Merge branch 'drm-intel-fixes' into drm-intel-next
Grab the latest stabilisation bits from -fixes and some suspend and
resume fixes from linus.
Conflicts:
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_irq.c
Diffstat (limited to 'arch/arm/kernel/hw_breakpoint.c')
-rw-r--r-- | arch/arm/kernel/hw_breakpoint.c | 44 |
1 files changed, 26 insertions, 18 deletions
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index c9f3f0467570..d600bd350704 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c | |||
@@ -137,11 +137,10 @@ static u8 get_debug_arch(void) | |||
137 | u32 didr; | 137 | u32 didr; |
138 | 138 | ||
139 | /* Do we implement the extended CPUID interface? */ | 139 | /* Do we implement the extended CPUID interface? */ |
140 | if (((read_cpuid_id() >> 16) & 0xf) != 0xf) { | 140 | if (WARN_ONCE((((read_cpuid_id() >> 16) & 0xf) != 0xf), |
141 | pr_warning("CPUID feature registers not supported. " | 141 | "CPUID feature registers not supported. " |
142 | "Assuming v6 debug is present.\n"); | 142 | "Assuming v6 debug is present.\n")) |
143 | return ARM_DEBUG_ARCH_V6; | 143 | return ARM_DEBUG_ARCH_V6; |
144 | } | ||
145 | 144 | ||
146 | ARM_DBG_READ(c0, 0, didr); | 145 | ARM_DBG_READ(c0, 0, didr); |
147 | return (didr >> 16) & 0xf; | 146 | return (didr >> 16) & 0xf; |
@@ -152,6 +151,12 @@ u8 arch_get_debug_arch(void) | |||
152 | return debug_arch; | 151 | return debug_arch; |
153 | } | 152 | } |
154 | 153 | ||
154 | static int debug_arch_supported(void) | ||
155 | { | ||
156 | u8 arch = get_debug_arch(); | ||
157 | return arch >= ARM_DEBUG_ARCH_V6 && arch <= ARM_DEBUG_ARCH_V7_ECP14; | ||
158 | } | ||
159 | |||
155 | /* Determine number of BRP register available. */ | 160 | /* Determine number of BRP register available. */ |
156 | static int get_num_brp_resources(void) | 161 | static int get_num_brp_resources(void) |
157 | { | 162 | { |
@@ -268,6 +273,9 @@ out: | |||
268 | 273 | ||
269 | int hw_breakpoint_slots(int type) | 274 | int hw_breakpoint_slots(int type) |
270 | { | 275 | { |
276 | if (!debug_arch_supported()) | ||
277 | return 0; | ||
278 | |||
271 | /* | 279 | /* |
272 | * We can be called early, so don't rely on | 280 | * We can be called early, so don't rely on |
273 | * our static variables being initialised. | 281 | * our static variables being initialised. |
@@ -834,11 +842,11 @@ static void reset_ctrl_regs(void *unused) | |||
834 | 842 | ||
835 | /* | 843 | /* |
836 | * v7 debug contains save and restore registers so that debug state | 844 | * v7 debug contains save and restore registers so that debug state |
837 | * can be maintained across low-power modes without leaving | 845 | * can be maintained across low-power modes without leaving the debug |
838 | * the debug logic powered up. It is IMPLEMENTATION DEFINED whether | 846 | * logic powered up. It is IMPLEMENTATION DEFINED whether we can access |
839 | * we can write to the debug registers out of reset, so we must | 847 | * the debug registers out of reset, so we must unlock the OS Lock |
840 | * unlock the OS Lock Access Register to avoid taking undefined | 848 | * Access Register to avoid taking undefined instruction exceptions |
841 | * instruction exceptions later on. | 849 | * later on. |
842 | */ | 850 | */ |
843 | if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { | 851 | if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { |
844 | /* | 852 | /* |
@@ -882,7 +890,7 @@ static int __init arch_hw_breakpoint_init(void) | |||
882 | 890 | ||
883 | debug_arch = get_debug_arch(); | 891 | debug_arch = get_debug_arch(); |
884 | 892 | ||
885 | if (debug_arch > ARM_DEBUG_ARCH_V7_ECP14) { | 893 | if (!debug_arch_supported()) { |
886 | pr_info("debug architecture 0x%x unsupported.\n", debug_arch); | 894 | pr_info("debug architecture 0x%x unsupported.\n", debug_arch); |
887 | return 0; | 895 | return 0; |
888 | } | 896 | } |
@@ -899,18 +907,18 @@ static int __init arch_hw_breakpoint_init(void) | |||
899 | pr_info("%d breakpoint(s) reserved for watchpoint " | 907 | pr_info("%d breakpoint(s) reserved for watchpoint " |
900 | "single-step.\n", core_num_reserved_brps); | 908 | "single-step.\n", core_num_reserved_brps); |
901 | 909 | ||
910 | /* | ||
911 | * Reset the breakpoint resources. We assume that a halting | ||
912 | * debugger will leave the world in a nice state for us. | ||
913 | */ | ||
914 | on_each_cpu(reset_ctrl_regs, NULL, 1); | ||
915 | |||
902 | ARM_DBG_READ(c1, 0, dscr); | 916 | ARM_DBG_READ(c1, 0, dscr); |
903 | if (dscr & ARM_DSCR_HDBGEN) { | 917 | if (dscr & ARM_DSCR_HDBGEN) { |
918 | max_watchpoint_len = 4; | ||
904 | pr_warning("halting debug mode enabled. Assuming maximum " | 919 | pr_warning("halting debug mode enabled. Assuming maximum " |
905 | "watchpoint size of 4 bytes."); | 920 | "watchpoint size of %u bytes.", max_watchpoint_len); |
906 | } else { | 921 | } else { |
907 | /* | ||
908 | * Reset the breakpoint resources. We assume that a halting | ||
909 | * debugger will leave the world in a nice state for us. | ||
910 | */ | ||
911 | smp_call_function(reset_ctrl_regs, NULL, 1); | ||
912 | reset_ctrl_regs(NULL); | ||
913 | |||
914 | /* Work out the maximum supported watchpoint length. */ | 922 | /* Work out the maximum supported watchpoint length. */ |
915 | max_watchpoint_len = get_max_wp_len(); | 923 | max_watchpoint_len = get_max_wp_len(); |
916 | pr_info("maximum watchpoint size is %u bytes.\n", | 924 | pr_info("maximum watchpoint size is %u bytes.\n", |