diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2008-08-28 06:22:32 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-09-01 07:06:34 -0400 |
commit | 93ed3970114983543bbebd195bef65db84444ea2 (patch) | |
tree | 9df88b61a2a7b3cc493c6cfc5f4848448250f6b5 /arch/arm/kernel/head.S | |
parent | 8d5796d2ec6b5a4e7a52861144e63af438d6f8f7 (diff) |
[ARM] 5227/1: Add the ENDPROC declarations to the .S files
This declaration specifies the "function" type and size for various
assembly functions, mainly needed for generating the correct branch
instructions in Thumb-2.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/head.S')
-rw-r--r-- | arch/arm/kernel/head.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index bff4c6e90dd5..21e17dc94cb5 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -75,7 +75,6 @@ | |||
75 | * circumstances, zImage) is for. | 75 | * circumstances, zImage) is for. |
76 | */ | 76 | */ |
77 | .section ".text.head", "ax" | 77 | .section ".text.head", "ax" |
78 | .type stext, %function | ||
79 | ENTRY(stext) | 78 | ENTRY(stext) |
80 | msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode | 79 | msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode |
81 | @ and irqs disabled | 80 | @ and irqs disabled |
@@ -100,9 +99,9 @@ ENTRY(stext) | |||
100 | @ mmu has been enabled | 99 | @ mmu has been enabled |
101 | adr lr, __enable_mmu @ return (PIC) address | 100 | adr lr, __enable_mmu @ return (PIC) address |
102 | add pc, r10, #PROCINFO_INITFUNC | 101 | add pc, r10, #PROCINFO_INITFUNC |
102 | ENDPROC(stext) | ||
103 | 103 | ||
104 | #if defined(CONFIG_SMP) | 104 | #if defined(CONFIG_SMP) |
105 | .type secondary_startup, #function | ||
106 | ENTRY(secondary_startup) | 105 | ENTRY(secondary_startup) |
107 | /* | 106 | /* |
108 | * Common entry point for secondary CPUs. | 107 | * Common entry point for secondary CPUs. |
@@ -128,6 +127,7 @@ ENTRY(secondary_startup) | |||
128 | adr lr, __enable_mmu @ return address | 127 | adr lr, __enable_mmu @ return address |
129 | add pc, r10, #PROCINFO_INITFUNC @ initialise processor | 128 | add pc, r10, #PROCINFO_INITFUNC @ initialise processor |
130 | @ (return control reg) | 129 | @ (return control reg) |
130 | ENDPROC(secondary_startup) | ||
131 | 131 | ||
132 | /* | 132 | /* |
133 | * r6 = &secondary_data | 133 | * r6 = &secondary_data |
@@ -136,6 +136,7 @@ ENTRY(__secondary_switched) | |||
136 | ldr sp, [r7, #4] @ get secondary_data.stack | 136 | ldr sp, [r7, #4] @ get secondary_data.stack |
137 | mov fp, #0 | 137 | mov fp, #0 |
138 | b secondary_start_kernel | 138 | b secondary_start_kernel |
139 | ENDPROC(__secondary_switched) | ||
139 | 140 | ||
140 | .type __secondary_data, %object | 141 | .type __secondary_data, %object |
141 | __secondary_data: | 142 | __secondary_data: |
@@ -151,7 +152,6 @@ __secondary_data: | |||
151 | * this is just loading the page table pointer and domain access | 152 | * this is just loading the page table pointer and domain access |
152 | * registers. | 153 | * registers. |
153 | */ | 154 | */ |
154 | .type __enable_mmu, %function | ||
155 | __enable_mmu: | 155 | __enable_mmu: |
156 | #ifdef CONFIG_ALIGNMENT_TRAP | 156 | #ifdef CONFIG_ALIGNMENT_TRAP |
157 | orr r0, r0, #CR_A | 157 | orr r0, r0, #CR_A |
@@ -174,6 +174,7 @@ __enable_mmu: | |||
174 | mcr p15, 0, r5, c3, c0, 0 @ load domain access register | 174 | mcr p15, 0, r5, c3, c0, 0 @ load domain access register |
175 | mcr p15, 0, r4, c2, c0, 0 @ load page table pointer | 175 | mcr p15, 0, r4, c2, c0, 0 @ load page table pointer |
176 | b __turn_mmu_on | 176 | b __turn_mmu_on |
177 | ENDPROC(__enable_mmu) | ||
177 | 178 | ||
178 | /* | 179 | /* |
179 | * Enable the MMU. This completely changes the structure of the visible | 180 | * Enable the MMU. This completely changes the structure of the visible |
@@ -187,7 +188,6 @@ __enable_mmu: | |||
187 | * other registers depend on the function called upon completion | 188 | * other registers depend on the function called upon completion |
188 | */ | 189 | */ |
189 | .align 5 | 190 | .align 5 |
190 | .type __turn_mmu_on, %function | ||
191 | __turn_mmu_on: | 191 | __turn_mmu_on: |
192 | mov r0, r0 | 192 | mov r0, r0 |
193 | mcr p15, 0, r0, c1, c0, 0 @ write control reg | 193 | mcr p15, 0, r0, c1, c0, 0 @ write control reg |
@@ -195,7 +195,7 @@ __turn_mmu_on: | |||
195 | mov r3, r3 | 195 | mov r3, r3 |
196 | mov r3, r3 | 196 | mov r3, r3 |
197 | mov pc, r13 | 197 | mov pc, r13 |
198 | 198 | ENDPROC(__turn_mmu_on) | |
199 | 199 | ||
200 | 200 | ||
201 | /* | 201 | /* |
@@ -211,7 +211,6 @@ __turn_mmu_on: | |||
211 | * r0, r3, r6, r7 corrupted | 211 | * r0, r3, r6, r7 corrupted |
212 | * r4 = physical page table address | 212 | * r4 = physical page table address |
213 | */ | 213 | */ |
214 | .type __create_page_tables, %function | ||
215 | __create_page_tables: | 214 | __create_page_tables: |
216 | pgtbl r4 @ page table address | 215 | pgtbl r4 @ page table address |
217 | 216 | ||
@@ -325,6 +324,7 @@ __create_page_tables: | |||
325 | #endif | 324 | #endif |
326 | #endif | 325 | #endif |
327 | mov pc, lr | 326 | mov pc, lr |
327 | ENDPROC(__create_page_tables) | ||
328 | .ltorg | 328 | .ltorg |
329 | 329 | ||
330 | #include "head-common.S" | 330 | #include "head-common.S" |