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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2011-12-09 14:52:10 -0500
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2013-01-31 15:44:46 -0500
commitbc7dea00a9a0ea385bbc4aed67dfdcf7d8879953 (patch)
tree242257c7c0a016595b672b3151abdf71ec5745a2 /arch/arm/kernel/head-nommu.S
parentb849a60e0903b1c5430c3859864554662e127a8d (diff)
ARM: let CPUs not being able to run in ARM mode enter in THUMB mode
Some ARM cores are not capable to run in ARM mode (e.g. Cortex-M3). So obviously these cannot enter the kernel in ARM mode. Make an exception for them and let them enter in THUMB mode. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Message-Id: 1358162123-30113-1-git-send-email-u.kleine-koenig@pengutronix.de Acked-by: Nicolas Pitre <nico@linaro.org>
Diffstat (limited to 'arch/arm/kernel/head-nommu.S')
-rw-r--r--arch/arm/kernel/head-nommu.S8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 2c228a07e58c..6a2e09c952c7 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -32,15 +32,21 @@
32 * numbers for r1. 32 * numbers for r1.
33 * 33 *
34 */ 34 */
35 .arm
36 35
37 __HEAD 36 __HEAD
37
38#ifdef CONFIG_CPU_THUMBONLY
39 .thumb
40ENTRY(stext)
41#else
42 .arm
38ENTRY(stext) 43ENTRY(stext)
39 44
40 THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM. 45 THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM.
41 THUMB( bx r9 ) @ If this is a Thumb-2 kernel, 46 THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
42 THUMB( .thumb ) @ switch to Thumb now. 47 THUMB( .thumb ) @ switch to Thumb now.
43 THUMB(1: ) 48 THUMB(1: )
49#endif
44 50
45 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode 51 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
46 @ and irqs disabled 52 @ and irqs disabled