[ARM] nommu: manage the CP15 things

All the current CP15 access codes in ARM arch can be categorized and
conditioned by the defines as follows:

     Related operation	Safe condition
  a. any CP15 access	!CPU_CP15
  b. alignment trap	CPU_CP15_MMU
  c. D-cache(C-bit)	CPU_CP15
  d. I-cache		CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 ||
				CPU_ARM720 || CPU_ARM740 ||
				CPU_XSCALE || CPU_XSC3 )
  e. alternate vector	CPU_CP15 && !CPU_ARM740
  f. TTB		CPU_CP15_MMU
  g. Domain		CPU_CP15_MMU
  h. FSR/FAR		CPU_CP15_MMU

For example, alternate vector is supported if and only if
"CPU_CP15 && !CPU_ARM740" is satisfied.

Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 6 insertions, 1 deletions

diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index ac9eb3d30518..698a537915dd 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -9,7 +9,6 @@
  * published by the Free Software Foundation.
  *
  *  Common kernel startup code (non-paged MM)
- *    for 32-bit CPUs which has a process ID register(CP15).
  *
  */
 #include <linux/linkage.h>
@@ -40,7 +39,11 @@
 ENTRY(stext)
         msr     cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
                                                 @ and irqs disabled
+#ifndef CONFIG_CPU_CP15
+        ldr     r9, =CONFIG_PROCESSOR_ID
+#else
         mrc     p15, 0, r9, c0, c0              @ get processor id
+#endif
         bl      __lookup_processor_type         @ r5=procinfo r9=cpuid
         movs    r10, r5                         @ invalid processor (r5=0)?
         beq     __error_p                               @ yes, error 'p'
@@ -58,6 +61,7 @@ ENTRY(stext)
  */
         .type   __after_proc_init, %function
 __after_proc_init:
+#ifdef CONFIG_CPU_CP15
         mrc     p15, 0, r0, c1, c0, 0           @ read control reg
 #ifdef CONFIG_ALIGNMENT_TRAP
         orr     r0, r0, #CR_A
@@ -74,6 +78,7 @@ __after_proc_init:
         bic     r0, r0, #CR_I
 #endif
         mcr     p15, 0, r0, c1, c0, 0           @ write control reg
+#endif /* CONFIG_CPU_CP15 */
 
         mov     pc, r13                         @ clear the BSS and jump
                                                 @ to start_kernel