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authorTony Lindgren <tony@atomide.com>2010-07-05 09:53:10 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-07-09 09:41:35 -0400
commitf159f4ed55bb0fa5470800641e03a13a7e0eae6e (patch)
treec2ed54b103c2a1c58fa4b50740fec462ccfeec74 /arch/arm/kernel/entry-armv.S
parentc1b2d9704c77ddaec46d5d681e1360ac40268743 (diff)
ARM: 6207/1: Replace CONFIG_HAS_TLS_REG with HWCAP_TLS and check for it on V6
The TLS register is only available on ARM1136 r1p0 and later. Set HWCAP_TLS flags if hardware TLS is available and test for it if CONFIG_CPU_32v6K is not set for V6. Note that we set the TLS instruction in __kuser_get_tls dynamically as suggested by Jamie Lokier <jamie@shareable.org>. Also the __switch_to code is optimized out in most cases as suggested by Nicolas Pitre <nico@fluxnic.net>. Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
-rw-r--r--arch/arm/kernel/entry-armv.S23
1 files changed, 7 insertions, 16 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 7ee48e7f8f31..a6cfb1791af3 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -22,6 +22,7 @@
22#include <asm/thread_notify.h> 22#include <asm/thread_notify.h>
23#include <asm/unwind.h> 23#include <asm/unwind.h>
24#include <asm/unistd.h> 24#include <asm/unistd.h>
25#include <asm/tls.h>
25 26
26#include "entry-header.S" 27#include "entry-header.S"
27 28
@@ -739,12 +740,7 @@ ENTRY(__switch_to)
739#ifdef CONFIG_MMU 740#ifdef CONFIG_MMU
740 ldr r6, [r2, #TI_CPU_DOMAIN] 741 ldr r6, [r2, #TI_CPU_DOMAIN]
741#endif 742#endif
742#if defined(CONFIG_HAS_TLS_REG) 743 set_tls r3, r4, r5
743 mcr p15, 0, r3, c13, c0, 3 @ set TLS register
744#elif !defined(CONFIG_TLS_REG_EMUL)
745 mov r4, #0xffff0fff
746 str r3, [r4, #-15] @ TLS val at 0xffff0ff0
747#endif
748#ifdef CONFIG_MMU 744#ifdef CONFIG_MMU
749 mcr p15, 0, r6, c3, c0, 0 @ Set domain register 745 mcr p15, 0, r6, c3, c0, 0 @ Set domain register
750#endif 746#endif
@@ -1009,17 +1005,12 @@ kuser_cmpxchg_fixup:
1009 */ 1005 */
1010 1006
1011__kuser_get_tls: @ 0xffff0fe0 1007__kuser_get_tls: @ 0xffff0fe0
1012 1008 ldr r0, [pc, #(16 - 8)] @ read TLS, set in kuser_get_tls_init
1013#if !defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL)
1014 ldr r0, [pc, #(16 - 8)] @ TLS stored at 0xffff0ff0
1015#else
1016 mrc p15, 0, r0, c13, c0, 3 @ read TLS register
1017#endif
1018 usr_ret lr 1009 usr_ret lr
1019 1010 mrc p15, 0, r0, c13, c0, 3 @ 0xffff0fe8 hardware TLS code
1020 .rep 5 1011 .rep 4
1021 .word 0 @ pad up to __kuser_helper_version 1012 .word 0 @ 0xffff0ff0 software TLS value, then
1022 .endr 1013 .endr @ pad up to __kuser_helper_version
1023 1014
1024/* 1015/*
1025 * Reference declaration: 1016 * Reference declaration: