ARM: 5757/1: Thumb-2: Correct "mov.w pc, lr" instruction which is unpredictable

The 32-bit wide variant of "mov pc, reg" in Thumb-2 is unpredictable
causing improper handling of the undefined instructions not caught by
the kernel. This patch adds a movw_pc macro for such situations
(currently only used in call_fpe).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 14 insertions, 14 deletions

diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 322410be573c..0022b4d57f8b 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -608,33 +608,33 @@ call_fpe:
  THUMB( add     pc, r8                  )
         nop
 
-        W(mov)  pc, lr                          @ CP#0
+        movw_pc lr                              @ CP#0
         W(b)    do_fpe                          @ CP#1 (FPE)
         W(b)    do_fpe                          @ CP#2 (FPE)
-        W(mov)  pc, lr                          @ CP#3
+        movw_pc lr                              @ CP#3
 #ifdef CONFIG_CRUNCH
         b       crunch_task_enable              @ CP#4 (MaverickCrunch)
         b       crunch_task_enable              @ CP#5 (MaverickCrunch)
         b       crunch_task_enable              @ CP#6 (MaverickCrunch)
 #else
-        W(mov)  pc, lr                          @ CP#4
-        W(mov)  pc, lr                          @ CP#5
-        W(mov)  pc, lr                          @ CP#6
+        movw_pc lr                              @ CP#4
+        movw_pc lr                              @ CP#5
+        movw_pc lr                              @ CP#6
 #endif
-        W(mov)  pc, lr                          @ CP#7
-        W(mov)  pc, lr                          @ CP#8
-        W(mov)  pc, lr                          @ CP#9
+        movw_pc lr                              @ CP#7
+        movw_pc lr                              @ CP#8
+        movw_pc lr                              @ CP#9
 #ifdef CONFIG_VFP
         W(b)    do_vfp                          @ CP#10 (VFP)
         W(b)    do_vfp                          @ CP#11 (VFP)
 #else
-        W(mov)  pc, lr                          @ CP#10 (VFP)
-        W(mov)  pc, lr                          @ CP#11 (VFP)
+        movw_pc lr                              @ CP#10 (VFP)
+        movw_pc lr                              @ CP#11 (VFP)
 #endif
-        W(mov)  pc, lr                          @ CP#12
-        W(mov)  pc, lr                          @ CP#13
-        W(mov)  pc, lr                          @ CP#14 (Debug)
-        W(mov)  pc, lr                          @ CP#15 (Control)
+        movw_pc lr                              @ CP#12
+        movw_pc lr                              @ CP#13
+        movw_pc lr                              @ CP#14 (Debug)
+        movw_pc lr                              @ CP#15 (Control)
 
 #ifdef CONFIG_NEON
         .align  6