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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2005-04-26 10:17:42 -0400
committerRussell King <rmk@dyn-67.arm.linux.org.uk>2005-04-26 10:17:42 -0400
commit7933523dc75823342dbd70a27760a82a5302baf4 (patch)
tree3baf443d6a598b8daa15ddd39565f0060d1867a9 /arch/arm/kernel/entry-armv.S
parent2fac6f3fec2303649e9cd572255776cb93d3f888 (diff)
[PATCH] ARM: remove some entry initialisation asm code
Convert the trivial vector entry initialisation code to C code. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
-rw-r--r--arch/arm/kernel/entry-armv.S47
1 files changed, 18 insertions, 29 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index bb27c317d94b..37723bfb96a6 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -522,8 +522,9 @@ ENTRY(__switch_to)
522/* 522/*
523 * Vector stubs. 523 * Vector stubs.
524 * 524 *
525 * This code is copied to 0x200 or 0xffff0200 so we can use branches in the 525 * This code is copied to 0xffff0200 so we can use branches in the
526 * vectors, rather than ldr's. 526 * vectors, rather than ldr's. Note that this code must not
527 * exceed 0x300 bytes.
527 * 528 *
528 * Common stub entry macro: 529 * Common stub entry macro:
529 * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC 530 * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
@@ -552,6 +553,7 @@ vector_\name:
552 movs pc, lr @ Changes mode and branches 553 movs pc, lr @ Changes mode and branches
553 .endm 554 .endm
554 555
556 .globl __stubs_start
555__stubs_start: 557__stubs_start:
556/* 558/*
557 * Interrupt dispatcher 559 * Interrupt dispatcher
@@ -686,37 +688,24 @@ vector_addrexcptn:
686.LCsabt: 688.LCsabt:
687 .word __temp_abt 689 .word __temp_abt
688 690
691 .globl __stubs_end
689__stubs_end: 692__stubs_end:
690 693
691 .equ __real_stubs_start, .LCvectors + 0x200 694 .equ stubs_offset, __vectors_start + 0x200 - __stubs_start
692 695
693.LCvectors: 696 .globl __vectors_start
697__vectors_start:
694 swi SYS_ERROR0 698 swi SYS_ERROR0
695 b __real_stubs_start + (vector_und - __stubs_start) 699 b vector_und + stubs_offset
696 ldr pc, __real_stubs_start + (.LCvswi - __stubs_start) 700 ldr pc, .LCvswi + stubs_offset
697 b __real_stubs_start + (vector_pabt - __stubs_start) 701 b vector_pabt + stubs_offset
698 b __real_stubs_start + (vector_dabt - __stubs_start) 702 b vector_dabt + stubs_offset
699 b __real_stubs_start + (vector_addrexcptn - __stubs_start) 703 b vector_addrexcptn + stubs_offset
700 b __real_stubs_start + (vector_irq - __stubs_start) 704 b vector_irq + stubs_offset
701 b __real_stubs_start + (vector_fiq - __stubs_start) 705 b vector_fiq + stubs_offset
702 706
703ENTRY(__trap_init) 707 .globl __vectors_end
704 stmfd sp!, {r4 - r6, lr} 708__vectors_end:
705
706 mov r0, #0xff000000
707 orr r0, r0, #0x00ff0000 @ high vectors position
708 adr r1, .LCvectors @ set up the vectors
709 ldmia r1, {r1, r2, r3, r4, r5, r6, ip, lr}
710 stmia r0, {r1, r2, r3, r4, r5, r6, ip, lr}
711
712 add r2, r0, #0x200
713 adr r0, __stubs_start @ copy stubs to 0x200
714 adr r1, __stubs_end
7151: ldr r3, [r0], #4
716 str r3, [r2], #4
717 cmp r0, r1
718 blt 1b
719 LOADREGS(fd, sp!, {r4 - r6, pc})
720 709
721 .data 710 .data
722 711