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authorPaul Brook <paul@codesourcery.com>2008-04-18 17:43:07 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2008-04-18 17:43:07 -0400
commit48d7927bdf071d05cf5d15b816cf06b0937cb84f (patch)
tree60f82f25897f9b3fd55148edac9348b451afc6cf /arch/arm/kernel/entry-armv.S
parentd7f864be8323e5394040e2877594645b0e7da85d (diff)
Add a prefetch abort handler
This patch adds a prefetch abort handler similar to the data abort one and renames the latter for consistency. Initial implementation by Paul Brook with some renaming by Catalin Marinas. Signed-off-by: Paul Brook <paul@codesourcery.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
-rw-r--r--arch/arm/kernel/entry-armv.S34
1 files changed, 24 insertions, 10 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index a46d5b456765..5e647eb6b3b9 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -166,12 +166,12 @@ __dabt_svc:
166 @ The abort handler must return the aborted address in r0, and 166 @ The abort handler must return the aborted address in r0, and
167 @ the fault status register in r1. r9 must be preserved. 167 @ the fault status register in r1. r9 must be preserved.
168 @ 168 @
169#ifdef MULTI_ABORT 169#ifdef MULTI_DABORT
170 ldr r4, .LCprocfns 170 ldr r4, .LCprocfns
171 mov lr, pc 171 mov lr, pc
172 ldr pc, [r4] 172 ldr pc, [r4, #PROCESSOR_DABT_FUNC]
173#else 173#else
174 bl CPU_ABORT_HANDLER 174 bl CPU_DABORT_HANDLER
175#endif 175#endif
176 176
177 @ 177 @
@@ -293,7 +293,6 @@ __pabt_svc:
293 mrs r9, cpsr 293 mrs r9, cpsr
294 tst r3, #PSR_I_BIT 294 tst r3, #PSR_I_BIT
295 biceq r9, r9, #PSR_I_BIT 295 biceq r9, r9, #PSR_I_BIT
296 msr cpsr_c, r9
297 296
298 @ 297 @
299 @ set args, then call main handler 298 @ set args, then call main handler
@@ -301,7 +300,15 @@ __pabt_svc:
301 @ r0 - address of faulting instruction 300 @ r0 - address of faulting instruction
302 @ r1 - pointer to registers on stack 301 @ r1 - pointer to registers on stack
303 @ 302 @
304 mov r0, r2 @ address (pc) 303#ifdef MULTI_PABORT
304 mov r0, r2 @ pass address of aborted instruction.
305 ldr r4, .LCprocfns
306 mov lr, pc
307 ldr pc, [r4, #PROCESSOR_PABT_FUNC]
308#else
309 CPU_PABORT_HANDLER(r0, r2)
310#endif
311 msr cpsr_c, r9 @ Maybe enable interrupts
305 mov r1, sp @ regs 312 mov r1, sp @ regs
306 bl do_PrefetchAbort @ call abort handler 313 bl do_PrefetchAbort @ call abort handler
307 314
@@ -320,7 +327,7 @@ __pabt_svc:
320 .align 5 327 .align 5
321.LCcralign: 328.LCcralign:
322 .word cr_alignment 329 .word cr_alignment
323#ifdef MULTI_ABORT 330#ifdef MULTI_DABORT
324.LCprocfns: 331.LCprocfns:
325 .word processor 332 .word processor
326#endif 333#endif
@@ -404,12 +411,12 @@ __dabt_usr:
404 @ The abort handler must return the aborted address in r0, and 411 @ The abort handler must return the aborted address in r0, and
405 @ the fault status register in r1. 412 @ the fault status register in r1.
406 @ 413 @
407#ifdef MULTI_ABORT 414#ifdef MULTI_DABORT
408 ldr r4, .LCprocfns 415 ldr r4, .LCprocfns
409 mov lr, pc 416 mov lr, pc
410 ldr pc, [r4] 417 ldr pc, [r4, #PROCESSOR_DABT_FUNC]
411#else 418#else
412 bl CPU_ABORT_HANDLER 419 bl CPU_DABORT_HANDLER
413#endif 420#endif
414 421
415 @ 422 @
@@ -619,8 +626,15 @@ __und_usr_unknown:
619__pabt_usr: 626__pabt_usr:
620 usr_entry 627 usr_entry
621 628
629#ifdef MULTI_PABORT
630 mov r0, r2 @ pass address of aborted instruction.
631 ldr r4, .LCprocfns
632 mov lr, pc
633 ldr pc, [r4, #PROCESSOR_PABT_FUNC]
634#else
635 CPU_PABORT_HANDLER(r0, r2)
636#endif
622 enable_irq @ Enable interrupts 637 enable_irq @ Enable interrupts
623 mov r0, r2 @ address (pc)
624 mov r1, sp @ regs 638 mov r1, sp @ regs
625 bl do_PrefetchAbort @ call abort handler 639 bl do_PrefetchAbort @ call abort handler
626 /* fall through */ 640 /* fall through */