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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-06-25 06:44:06 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-07-02 05:56:00 -0400
commit02fe2845d6a837ab02f0738f6cf4591a02cc88d4 (patch)
treee50d06a1ab73a2735dd145edde458463b1da4a37 /arch/arm/kernel/entry-armv.S
parent8b4186160b7894ca4583f702a562856d5d9e9118 (diff)
ARM: entry: avoid enabling interrupts in prefetch/data abort handlers
Avoid enabling interrupts if the parent context had interrupts enabled in the abort handler assembly code, and move this into the breakpoint/ page/alignment fault handlers instead. This gets rid of some special-casing for the breakpoint fault handlers from the low level abort handler path. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
-rw-r--r--arch/arm/kernel/entry-armv.S43
1 files changed, 19 insertions, 24 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index d644d0240ad3..c46bafa2f6dc 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -185,20 +185,15 @@ ENDPROC(__und_invalid)
185__dabt_svc: 185__dabt_svc:
186 svc_entry 186 svc_entry
187 187
188 @ 188#ifdef CONFIG_TRACE_IRQFLAGS
189 @ get ready to re-enable interrupts if appropriate 189 bl trace_hardirqs_off
190 @ 190#endif
191 mrs r9, cpsr
192 tst r5, #PSR_I_BIT
193 biceq r9, r9, #PSR_I_BIT
194 191
195 dabt_helper 192 dabt_helper
196 193
197 @ 194 @
198 @ set desired IRQ state, then call main handler 195 @ call main handler
199 @ 196 @
200 debug_entry r1
201 msr cpsr_c, r9
202 mov r2, sp 197 mov r2, sp
203 bl do_DataAbort 198 bl do_DataAbort
204 199
@@ -211,6 +206,12 @@ __dabt_svc:
211 @ restore SPSR and restart the instruction 206 @ restore SPSR and restart the instruction
212 @ 207 @
213 ldr r5, [sp, #S_PSR] 208 ldr r5, [sp, #S_PSR]
209#ifdef CONFIG_TRACE_IRQFLAGS
210 tst r5, #PSR_I_BIT
211 bleq trace_hardirqs_on
212 tst r5, #PSR_I_BIT
213 blne trace_hardirqs_off
214#endif
214 svc_exit r5 @ return from exception 215 svc_exit r5 @ return from exception
215 UNWIND(.fnend ) 216 UNWIND(.fnend )
216ENDPROC(__dabt_svc) 217ENDPROC(__dabt_svc)
@@ -307,16 +308,11 @@ ENDPROC(__und_svc)
307__pabt_svc: 308__pabt_svc:
308 svc_entry 309 svc_entry
309 310
310 @ 311#ifdef CONFIG_TRACE_IRQFLAGS
311 @ re-enable interrupts if appropriate 312 bl trace_hardirqs_off
312 @ 313#endif
313 mrs r9, cpsr
314 tst r5, #PSR_I_BIT
315 biceq r9, r9, #PSR_I_BIT
316 314
317 pabt_helper 315 pabt_helper
318 debug_entry r1
319 msr cpsr_c, r9 @ Maybe enable interrupts
320 mov r2, sp @ regs 316 mov r2, sp @ regs
321 bl do_PrefetchAbort @ call abort handler 317 bl do_PrefetchAbort @ call abort handler
322 318
@@ -329,6 +325,12 @@ __pabt_svc:
329 @ restore SPSR and restart the instruction 325 @ restore SPSR and restart the instruction
330 @ 326 @
331 ldr r5, [sp, #S_PSR] 327 ldr r5, [sp, #S_PSR]
328#ifdef CONFIG_TRACE_IRQFLAGS
329 tst r5, #PSR_I_BIT
330 bleq trace_hardirqs_on
331 tst r5, #PSR_I_BIT
332 blne trace_hardirqs_off
333#endif
332 svc_exit r5 @ return from exception 334 svc_exit r5 @ return from exception
333 UNWIND(.fnend ) 335 UNWIND(.fnend )
334ENDPROC(__pabt_svc) 336ENDPROC(__pabt_svc)
@@ -412,11 +414,6 @@ __dabt_usr:
412 kuser_cmpxchg_check 414 kuser_cmpxchg_check
413 dabt_helper 415 dabt_helper
414 416
415 @
416 @ IRQs on, then call the main handler
417 @
418 debug_entry r1
419 enable_irq
420 mov r2, sp 417 mov r2, sp
421 adr lr, BSYM(ret_from_exception) 418 adr lr, BSYM(ret_from_exception)
422 b do_DataAbort 419 b do_DataAbort
@@ -663,8 +660,6 @@ ENDPROC(__und_usr_unknown)
663__pabt_usr: 660__pabt_usr:
664 usr_entry 661 usr_entry
665 pabt_helper 662 pabt_helper
666 debug_entry r1
667 enable_irq @ Enable interrupts
668 mov r2, sp @ regs 663 mov r2, sp @ regs
669 bl do_PrefetchAbort @ call abort handler 664 bl do_PrefetchAbort @ call abort handler
670 UNWIND(.fnend ) 665 UNWIND(.fnend )