diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2010-09-13 11:03:21 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-11-04 11:44:31 -0400 |
commit | 247055aa21ffef1c49dd64710d5e94c2aee19b58 (patch) | |
tree | e9e026b96597d080de4c16bb88c17b0495c61904 /arch/arm/kernel/entry-armv.S | |
parent | ff8b16d7e15a8ba2a6086645614a483e048e3fbf (diff) |
ARM: 6384/1: Remove the domain switching on ARMv6k/v7 CPUs
This patch removes the domain switching functionality via the set_fs and
__switch_to functions on cores that have a TLS register.
Currently, the ioremap and vmalloc areas share the same level 1 page
tables and therefore have the same domain (DOMAIN_KERNEL). When the
kernel domain is modified from Client to Manager (via the __set_fs or in
the __switch_to function), the XN (eXecute Never) bit is overridden and
newer CPUs can speculatively prefetch the ioremap'ed memory.
Linux performs the kernel domain switching to allow user-specific
functions (copy_to/from_user, get/put_user etc.) to access kernel
memory. In order for these functions to work with the kernel domain set
to Client, the patch modifies the LDRT/STRT and related instructions to
the LDR/STR ones.
The user pages access rights are also modified for kernel read-only
access rather than read/write so that the copy-on-write mechanism still
works. CPU_USE_DOMAINS gets disabled only if the hardware has a TLS register
(CPU_32v6K is defined) since writing the TLS value to the high vectors page
isn't possible.
The user addresses passed to the kernel are checked by the access_ok()
function so that they do not point to the kernel space.
Tested-by: Anton Vorontsov <cbouatmailru@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
-rw-r--r-- | arch/arm/kernel/entry-armv.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index c09e3573c5de..35f3f20d6731 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -735,7 +735,7 @@ ENTRY(__switch_to) | |||
735 | THUMB( stmia ip!, {r4 - sl, fp} ) @ Store most regs on stack | 735 | THUMB( stmia ip!, {r4 - sl, fp} ) @ Store most regs on stack |
736 | THUMB( str sp, [ip], #4 ) | 736 | THUMB( str sp, [ip], #4 ) |
737 | THUMB( str lr, [ip], #4 ) | 737 | THUMB( str lr, [ip], #4 ) |
738 | #ifdef CONFIG_MMU | 738 | #ifdef CONFIG_CPU_USE_DOMAINS |
739 | ldr r6, [r2, #TI_CPU_DOMAIN] | 739 | ldr r6, [r2, #TI_CPU_DOMAIN] |
740 | #endif | 740 | #endif |
741 | set_tls r3, r4, r5 | 741 | set_tls r3, r4, r5 |
@@ -744,7 +744,7 @@ ENTRY(__switch_to) | |||
744 | ldr r8, =__stack_chk_guard | 744 | ldr r8, =__stack_chk_guard |
745 | ldr r7, [r7, #TSK_STACK_CANARY] | 745 | ldr r7, [r7, #TSK_STACK_CANARY] |
746 | #endif | 746 | #endif |
747 | #ifdef CONFIG_MMU | 747 | #ifdef CONFIG_CPU_USE_DOMAINS |
748 | mcr p15, 0, r6, c3, c0, 0 @ Set domain register | 748 | mcr p15, 0, r6, c3, c0, 0 @ Set domain register |
749 | #endif | 749 | #endif |
750 | mov r5, r0 | 750 | mov r5, r0 |