diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2010-09-13 10:57:36 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-09-19 07:17:43 -0400 |
commit | c01778001a4f5ad9c62d882776235f3f31922fdd (patch) | |
tree | a425979b236dd5c7757e9a1f0c66d3819ad99021 /arch/arm/include | |
parent | 0fc73099dd25df2c5181b7bad57d1faa5cd12d3c (diff) |
ARM: 6379/1: Assume new page cache pages have dirty D-cache
There are places in Linux where writes to newly allocated page cache
pages happen without a subsequent call to flush_dcache_page() (several
PIO drivers including USB HCD). This patch changes the meaning of
PG_arch_1 to be PG_dcache_clean and always flush the D-cache for a newly
mapped page in update_mmu_cache().
The patch also sets the PG_arch_1 bit in the DMA cache maintenance
function to avoid additional cache flushing in update_mmu_cache().
Tested-by: Rabin Vincent <rabin.vincent@stericsson.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/cacheflush.h | 6 | ||||
-rw-r--r-- | arch/arm/include/asm/tlbflush.h | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 4656a24058d2..d3730f0f4b50 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h | |||
@@ -137,10 +137,10 @@ | |||
137 | #endif | 137 | #endif |
138 | 138 | ||
139 | /* | 139 | /* |
140 | * This flag is used to indicate that the page pointed to by a pte | 140 | * This flag is used to indicate that the page pointed to by a pte is clean |
141 | * is dirty and requires cleaning before returning it to the user. | 141 | * and does not require cleaning before returning it to the user. |
142 | */ | 142 | */ |
143 | #define PG_dcache_dirty PG_arch_1 | 143 | #define PG_dcache_clean PG_arch_1 |
144 | 144 | ||
145 | /* | 145 | /* |
146 | * MM Cache Management | 146 | * MM Cache Management |
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h index 33b546ae72d4..9ad329ad7458 100644 --- a/arch/arm/include/asm/tlbflush.h +++ b/arch/arm/include/asm/tlbflush.h | |||
@@ -560,7 +560,7 @@ extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); | |||
560 | #endif | 560 | #endif |
561 | 561 | ||
562 | /* | 562 | /* |
563 | * if PG_dcache_dirty is set for the page, we need to ensure that any | 563 | * If PG_dcache_clean is not set for the page, we need to ensure that any |
564 | * cache entries for the kernels virtual memory range are written | 564 | * cache entries for the kernels virtual memory range are written |
565 | * back to the page. | 565 | * back to the page. |
566 | */ | 566 | */ |