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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-10-28 15:39:13 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-10-28 15:39:13 -0400
commit9bafc74163d8bccca9810159aab39be926fb877c (patch)
treebaa3ba406135247eeb9cdf495448b5db8eea2f0b /arch/arm/include
parent8df6516864462cb7a6f87d5a46df68fb0faebbb5 (diff)
parentb3773301c4290f054aa2aa5379e59a1bf4f78bdf (diff)
Merge branch 'devel-stable' into devel
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/hardware/cache-l2x0.h13
-rw-r--r--arch/arm/include/asm/outercache.h24
2 files changed, 34 insertions, 3 deletions
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 6bcba48800fe..cc42d5fdee17 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -21,9 +21,6 @@
21#define __ASM_ARM_HARDWARE_L2X0_H 21#define __ASM_ARM_HARDWARE_L2X0_H
22 22
23#define L2X0_CACHE_ID 0x000 23#define L2X0_CACHE_ID 0x000
24#define L2X0_CACHE_ID_PART_MASK (0xf << 6)
25#define L2X0_CACHE_ID_PART_L210 (1 << 6)
26#define L2X0_CACHE_ID_PART_L310 (3 << 6)
27#define L2X0_CACHE_TYPE 0x004 24#define L2X0_CACHE_TYPE 0x004
28#define L2X0_CTRL 0x100 25#define L2X0_CTRL 0x100
29#define L2X0_AUX_CTRL 0x104 26#define L2X0_AUX_CTRL 0x104
@@ -53,6 +50,16 @@
53#define L2X0_LINE_DATA 0xF10 50#define L2X0_LINE_DATA 0xF10
54#define L2X0_LINE_TAG 0xF30 51#define L2X0_LINE_TAG 0xF30
55#define L2X0_DEBUG_CTRL 0xF40 52#define L2X0_DEBUG_CTRL 0xF40
53#define L2X0_PREFETCH_CTRL 0xF60
54#define L2X0_POWER_CTRL 0xF80
55#define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1)
56#define L2X0_STNDBY_MODE_EN (1 << 0)
57
58/* Registers shifts and masks */
59#define L2X0_CACHE_ID_PART_MASK (0xf << 6)
60#define L2X0_CACHE_ID_PART_L210 (1 << 6)
61#define L2X0_CACHE_ID_PART_L310 (3 << 6)
62#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x3 << 17)
56 63
57#ifndef __ASSEMBLY__ 64#ifndef __ASSEMBLY__
58extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); 65extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask);
diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
index 25f76bae57ab..fc1900925275 100644
--- a/arch/arm/include/asm/outercache.h
+++ b/arch/arm/include/asm/outercache.h
@@ -25,6 +25,9 @@ struct outer_cache_fns {
25 void (*inv_range)(unsigned long, unsigned long); 25 void (*inv_range)(unsigned long, unsigned long);
26 void (*clean_range)(unsigned long, unsigned long); 26 void (*clean_range)(unsigned long, unsigned long);
27 void (*flush_range)(unsigned long, unsigned long); 27 void (*flush_range)(unsigned long, unsigned long);
28 void (*flush_all)(void);
29 void (*inv_all)(void);
30 void (*disable)(void);
28#ifdef CONFIG_OUTER_CACHE_SYNC 31#ifdef CONFIG_OUTER_CACHE_SYNC
29 void (*sync)(void); 32 void (*sync)(void);
30#endif 33#endif
@@ -50,6 +53,24 @@ static inline void outer_flush_range(unsigned long start, unsigned long end)
50 outer_cache.flush_range(start, end); 53 outer_cache.flush_range(start, end);
51} 54}
52 55
56static inline void outer_flush_all(void)
57{
58 if (outer_cache.flush_all)
59 outer_cache.flush_all();
60}
61
62static inline void outer_inv_all(void)
63{
64 if (outer_cache.inv_all)
65 outer_cache.inv_all();
66}
67
68static inline void outer_disable(void)
69{
70 if (outer_cache.disable)
71 outer_cache.disable();
72}
73
53#else 74#else
54 75
55static inline void outer_inv_range(unsigned long start, unsigned long end) 76static inline void outer_inv_range(unsigned long start, unsigned long end)
@@ -58,6 +79,9 @@ static inline void outer_clean_range(unsigned long start, unsigned long end)
58{ } 79{ }
59static inline void outer_flush_range(unsigned long start, unsigned long end) 80static inline void outer_flush_range(unsigned long start, unsigned long end)
60{ } 81{ }
82static inline void outer_flush_all(void) { }
83static inline void outer_inv_all(void) { }
84static inline void outer_disable(void) { }
61 85
62#endif 86#endif
63 87