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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-02-21 16:42:50 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-21 16:42:50 -0500
commit22b61a11fd4e6d7a48d694ce350331bebc0394ed (patch)
treef4be46c8154f5094c248fcd9fdf644b236f591b3 /arch/arm/include
parent423145a5d4def58cff760809d48cfb21316d59a9 (diff)
parentfa4e998999322bc1b11d2c8b19b9fa2016fd1548 (diff)
Merge branch 'dma' into devel
Conflicts: arch/arm/plat-mxc/dma-mx1-mx2.c
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/dma.h46
-rw-r--r--arch/arm/include/asm/mach/dma.h35
2 files changed, 37 insertions, 44 deletions
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h
index df5638f3643a..7edf3536df24 100644
--- a/arch/arm/include/asm/dma.h
+++ b/arch/arm/include/asm/dma.h
@@ -19,21 +19,17 @@
19#include <asm/system.h> 19#include <asm/system.h>
20#include <asm/scatterlist.h> 20#include <asm/scatterlist.h>
21 21
22typedef unsigned int dmach_t;
23
24#include <mach/isa-dma.h> 22#include <mach/isa-dma.h>
25 23
26/* 24/*
27 * DMA modes 25 * The DMA modes reflect the settings for the ISA DMA controller
28 */ 26 */
29typedef unsigned int dmamode_t; 27#define DMA_MODE_MASK 0xcc
30
31#define DMA_MODE_MASK 3
32 28
33#define DMA_MODE_READ 0 29#define DMA_MODE_READ 0x44
34#define DMA_MODE_WRITE 1 30#define DMA_MODE_WRITE 0x48
35#define DMA_MODE_CASCADE 2 31#define DMA_MODE_CASCADE 0xc0
36#define DMA_AUTOINIT 4 32#define DMA_AUTOINIT 0x10
37 33
38extern spinlock_t dma_spin_lock; 34extern spinlock_t dma_spin_lock;
39 35
@@ -52,44 +48,44 @@ static inline void release_dma_lock(unsigned long flags)
52/* Clear the 'DMA Pointer Flip Flop'. 48/* Clear the 'DMA Pointer Flip Flop'.
53 * Write 0 for LSB/MSB, 1 for MSB/LSB access. 49 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
54 */ 50 */
55#define clear_dma_ff(channel) 51#define clear_dma_ff(chan)
56 52
57/* Set only the page register bits of the transfer address. 53/* Set only the page register bits of the transfer address.
58 * 54 *
59 * NOTE: This is an architecture specific function, and should 55 * NOTE: This is an architecture specific function, and should
60 * be hidden from the drivers 56 * be hidden from the drivers
61 */ 57 */
62extern void set_dma_page(dmach_t channel, char pagenr); 58extern void set_dma_page(unsigned int chan, char pagenr);
63 59
64/* Request a DMA channel 60/* Request a DMA channel
65 * 61 *
66 * Some architectures may need to do allocate an interrupt 62 * Some architectures may need to do allocate an interrupt
67 */ 63 */
68extern int request_dma(dmach_t channel, const char * device_id); 64extern int request_dma(unsigned int chan, const char * device_id);
69 65
70/* Free a DMA channel 66/* Free a DMA channel
71 * 67 *
72 * Some architectures may need to do free an interrupt 68 * Some architectures may need to do free an interrupt
73 */ 69 */
74extern void free_dma(dmach_t channel); 70extern void free_dma(unsigned int chan);
75 71
76/* Enable DMA for this channel 72/* Enable DMA for this channel
77 * 73 *
78 * On some architectures, this may have other side effects like 74 * On some architectures, this may have other side effects like
79 * enabling an interrupt and setting the DMA registers. 75 * enabling an interrupt and setting the DMA registers.
80 */ 76 */
81extern void enable_dma(dmach_t channel); 77extern void enable_dma(unsigned int chan);
82 78
83/* Disable DMA for this channel 79/* Disable DMA for this channel
84 * 80 *
85 * On some architectures, this may have other side effects like 81 * On some architectures, this may have other side effects like
86 * disabling an interrupt or whatever. 82 * disabling an interrupt or whatever.
87 */ 83 */
88extern void disable_dma(dmach_t channel); 84extern void disable_dma(unsigned int chan);
89 85
90/* Test whether the specified channel has an active DMA transfer 86/* Test whether the specified channel has an active DMA transfer
91 */ 87 */
92extern int dma_channel_active(dmach_t channel); 88extern int dma_channel_active(unsigned int chan);
93 89
94/* Set the DMA scatter gather list for this channel 90/* Set the DMA scatter gather list for this channel
95 * 91 *
@@ -97,7 +93,7 @@ extern int dma_channel_active(dmach_t channel);
97 * especially since some DMA architectures don't update the 93 * especially since some DMA architectures don't update the
98 * DMA address immediately, but defer it to the enable_dma(). 94 * DMA address immediately, but defer it to the enable_dma().
99 */ 95 */
100extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); 96extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg);
101 97
102/* Set the DMA address for this channel 98/* Set the DMA address for this channel
103 * 99 *
@@ -105,9 +101,9 @@ extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg);
105 * especially since some DMA architectures don't update the 101 * especially since some DMA architectures don't update the
106 * DMA address immediately, but defer it to the enable_dma(). 102 * DMA address immediately, but defer it to the enable_dma().
107 */ 103 */
108extern void __set_dma_addr(dmach_t channel, void *addr); 104extern void __set_dma_addr(unsigned int chan, void *addr);
109#define set_dma_addr(channel, addr) \ 105#define set_dma_addr(chan, addr) \
110 __set_dma_addr(channel, bus_to_virt(addr)) 106 __set_dma_addr(chan, bus_to_virt(addr))
111 107
112/* Set the DMA byte count for this channel 108/* Set the DMA byte count for this channel
113 * 109 *
@@ -115,7 +111,7 @@ extern void __set_dma_addr(dmach_t channel, void *addr);
115 * especially since some DMA architectures don't update the 111 * especially since some DMA architectures don't update the
116 * DMA count immediately, but defer it to the enable_dma(). 112 * DMA count immediately, but defer it to the enable_dma().
117 */ 113 */
118extern void set_dma_count(dmach_t channel, unsigned long count); 114extern void set_dma_count(unsigned int chan, unsigned long count);
119 115
120/* Set the transfer direction for this channel 116/* Set the transfer direction for this channel
121 * 117 *
@@ -124,11 +120,11 @@ extern void set_dma_count(dmach_t channel, unsigned long count);
124 * DMA transfer direction immediately, but defer it to the 120 * DMA transfer direction immediately, but defer it to the
125 * enable_dma(). 121 * enable_dma().
126 */ 122 */
127extern void set_dma_mode(dmach_t channel, dmamode_t mode); 123extern void set_dma_mode(unsigned int chan, unsigned int mode);
128 124
129/* Set the transfer speed for this channel 125/* Set the transfer speed for this channel
130 */ 126 */
131extern void set_dma_speed(dmach_t channel, int cycle_ns); 127extern void set_dma_speed(unsigned int chan, int cycle_ns);
132 128
133/* Get DMA residue count. After a DMA transfer, this 129/* Get DMA residue count. After a DMA transfer, this
134 * should return zero. Reading this while a DMA transfer is 130 * should return zero. Reading this while a DMA transfer is
@@ -136,7 +132,7 @@ extern void set_dma_speed(dmach_t channel, int cycle_ns);
136 * If called before the channel has been used, it may return 1. 132 * If called before the channel has been used, it may return 1.
137 * Otherwise, it returns the number of _bytes_ left to transfer. 133 * Otherwise, it returns the number of _bytes_ left to transfer.
138 */ 134 */
139extern int get_dma_residue(dmach_t channel); 135extern int get_dma_residue(unsigned int chan);
140 136
141#ifndef NO_DMA 137#ifndef NO_DMA
142#define NO_DMA 255 138#define NO_DMA 255
diff --git a/arch/arm/include/asm/mach/dma.h b/arch/arm/include/asm/mach/dma.h
index fc7278ea7146..9e614a18e680 100644
--- a/arch/arm/include/asm/mach/dma.h
+++ b/arch/arm/include/asm/mach/dma.h
@@ -15,13 +15,13 @@ struct dma_struct;
15typedef struct dma_struct dma_t; 15typedef struct dma_struct dma_t;
16 16
17struct dma_ops { 17struct dma_ops {
18 int (*request)(dmach_t, dma_t *); /* optional */ 18 int (*request)(unsigned int, dma_t *); /* optional */
19 void (*free)(dmach_t, dma_t *); /* optional */ 19 void (*free)(unsigned int, dma_t *); /* optional */
20 void (*enable)(dmach_t, dma_t *); /* mandatory */ 20 void (*enable)(unsigned int, dma_t *); /* mandatory */
21 void (*disable)(dmach_t, dma_t *); /* mandatory */ 21 void (*disable)(unsigned int, dma_t *); /* mandatory */
22 int (*residue)(dmach_t, dma_t *); /* optional */ 22 int (*residue)(unsigned int, dma_t *); /* optional */
23 int (*setspeed)(dmach_t, dma_t *, int); /* optional */ 23 int (*setspeed)(unsigned int, dma_t *, int); /* optional */
24 char *type; 24 const char *type;
25}; 25};
26 26
27struct dma_struct { 27struct dma_struct {
@@ -34,24 +34,21 @@ struct dma_struct {
34 unsigned int active:1; /* Transfer active */ 34 unsigned int active:1; /* Transfer active */
35 unsigned int invalid:1; /* Address/Count changed */ 35 unsigned int invalid:1; /* Address/Count changed */
36 36
37 dmamode_t dma_mode; /* DMA mode */ 37 unsigned int dma_mode; /* DMA mode */
38 int speed; /* DMA speed */ 38 int speed; /* DMA speed */
39 39
40 unsigned int lock; /* Device is allocated */ 40 unsigned int lock; /* Device is allocated */
41 const char *device_id; /* Device name */ 41 const char *device_id; /* Device name */
42 42
43 unsigned int dma_base; /* Controller base address */ 43 const struct dma_ops *d_ops;
44 int dma_irq; /* Controller IRQ */
45 struct scatterlist cur_sg; /* Current controller buffer */
46 unsigned int state;
47
48 struct dma_ops *d_ops;
49}; 44};
50 45
51/* Prototype: void arch_dma_init(dma) 46/*
52 * Purpose : Initialise architecture specific DMA 47 * isa_dma_add - add an ISA-style DMA channel
53 * Params : dma - pointer to array of DMA structures
54 */ 48 */
55extern void arch_dma_init(dma_t *dma); 49extern int isa_dma_add(unsigned int, dma_t *dma);
56 50
57extern void isa_init_dma(dma_t *dma); 51/*
52 * Add the ISA DMA controller. Always takes channels 0-7.
53 */
54extern void isa_init_dma(void);