diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-14 14:59:44 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-14 14:59:44 -0400 |
commit | bbbfb910d14988963fbc0b3fc5fc460daf21bf24 (patch) | |
tree | d06629217c7b91f678ef821295f133c0ef6781fa /arch/arm/include | |
parent | d0a0c28cf178943afaf22f87957b73c47497cb4b (diff) | |
parent | a739260d4e3d88c5c810b14231dbdce73665b0b2 (diff) |
Merge branch 'for-linus/samsung-2635' of git://git.fluff.org/bjdooks/linux
* 'for-linus/samsung-2635' of git://git.fluff.org/bjdooks/linux:
DMAENGINE: correct PL080 register header file
ARM: SAMSUNG: Fix on build warning about dependency in Kconfig
ARM: SMDK6410: Make virtual screen twice depth of real
ARM: S3C64XX: Update consistent DMA size to 8MiB
ARM: S3C64XX: Add audio support to SmartQ
ARM: S3C64XX: Framebuffer fix for SmartQ5
ARM: S3C64XX: Set wifi and iNAND as permanently connected SD devices on SmartQ boards
ARM: S3C64XX: Move SmartQ LCD control platform definition to shared file
ARM: mach-real6410: add sdhc device support
ARM: mach-real6410: add dm9000 ethernet support for mach-real6410
ARM: S3C64XX: Support for Real6410
Fix up trivial conflicts in arch/arm/mach-s3c64xx/mach-smartq5.c
("remove pixclock" vs "Framebuffer fix for SmartQ5")
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/hardware/pl080.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/include/asm/hardware/pl080.h b/arch/arm/include/asm/hardware/pl080.h index 6a6c66be7f65..f35b86e68dd5 100644 --- a/arch/arm/include/asm/hardware/pl080.h +++ b/arch/arm/include/asm/hardware/pl080.h | |||
@@ -43,7 +43,7 @@ | |||
43 | 43 | ||
44 | /* Per channel configuration registers */ | 44 | /* Per channel configuration registers */ |
45 | 45 | ||
46 | #define PL008_Cx_STRIDE (0x20) | 46 | #define PL080_Cx_STRIDE (0x20) |
47 | #define PL080_Cx_BASE(x) ((0x100 + (x * 0x20))) | 47 | #define PL080_Cx_BASE(x) ((0x100 + (x * 0x20))) |
48 | #define PL080_Cx_SRC_ADDR(x) ((0x100 + (x * 0x20))) | 48 | #define PL080_Cx_SRC_ADDR(x) ((0x100 + (x * 0x20))) |
49 | #define PL080_Cx_DST_ADDR(x) ((0x104 + (x * 0x20))) | 49 | #define PL080_Cx_DST_ADDR(x) ((0x104 + (x * 0x20))) |
@@ -68,6 +68,8 @@ | |||
68 | #define PL080_CONTROL_TC_IRQ_EN (1 << 31) | 68 | #define PL080_CONTROL_TC_IRQ_EN (1 << 31) |
69 | #define PL080_CONTROL_PROT_MASK (0x7 << 28) | 69 | #define PL080_CONTROL_PROT_MASK (0x7 << 28) |
70 | #define PL080_CONTROL_PROT_SHIFT (28) | 70 | #define PL080_CONTROL_PROT_SHIFT (28) |
71 | #define PL080_CONTROL_PROT_CACHE (1 << 30) | ||
72 | #define PL080_CONTROL_PROT_BUFF (1 << 29) | ||
71 | #define PL080_CONTROL_PROT_SYS (1 << 28) | 73 | #define PL080_CONTROL_PROT_SYS (1 << 28) |
72 | #define PL080_CONTROL_DST_INCR (1 << 27) | 74 | #define PL080_CONTROL_DST_INCR (1 << 27) |
73 | #define PL080_CONTROL_SRC_INCR (1 << 26) | 75 | #define PL080_CONTROL_SRC_INCR (1 << 26) |