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authorPaul Walmsley <paul@pwsan.com>2008-08-11 19:04:15 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-08-12 14:54:08 -0400
commit61db7fb1c78c32b6abdc5c7965981de332aeaa5b (patch)
treeeab85774d332d93c8c3d9476b9c7ff7576259cc5 /arch/arm/include
parent751a8ae95d7ab951104bd1bb643e4b8c8ee5fc4d (diff)
[ARM] 5192/1: ARM TLB: add v7wbi_{possible,always}_flags to {possible,always}_tlb_flags
Commit 2ccdd1e77da52ad494e9af46bf272d816830cb28 doesn't add v7wbi_possible_flags and v7wbi_always_flags to possible_tlb_flags and always_tlb_flags. This causes the L2 cache flush in clean_pmd_entry() (intended for Feroceon only) to execute on ARMv7, and the CPU hangs. This patch is required for OMAP3 boards to boot. Signed-off-by: Paul Walmsley <paul@pwsan.com> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/tlbflush.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 0d0d40f1b599..b543a054a17e 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -54,6 +54,7 @@
54 * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction 54 * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
55 * fr - Feroceon (v4wbi with non-outer-cacheable page table walks) 55 * fr - Feroceon (v4wbi with non-outer-cacheable page table walks)
56 * v6wbi - ARMv6 with write buffer with I TLB flush entry instruction 56 * v6wbi - ARMv6 with write buffer with I TLB flush entry instruction
57 * v7wbi - identical to v6wbi
57 */ 58 */
58#undef _TLB 59#undef _TLB
59#undef MULTI_TLB 60#undef MULTI_TLB
@@ -266,14 +267,16 @@ extern struct cpu_tlb_fns cpu_tlb;
266 v4wbi_possible_flags | \ 267 v4wbi_possible_flags | \
267 fr_possible_flags | \ 268 fr_possible_flags | \
268 v4wb_possible_flags | \ 269 v4wb_possible_flags | \
269 v6wbi_possible_flags) 270 v6wbi_possible_flags | \
271 v7wbi_possible_flags)
270 272
271#define always_tlb_flags (v3_always_flags & \ 273#define always_tlb_flags (v3_always_flags & \
272 v4_always_flags & \ 274 v4_always_flags & \
273 v4wbi_always_flags & \ 275 v4wbi_always_flags & \
274 fr_always_flags & \ 276 fr_always_flags & \
275 v4wb_always_flags & \ 277 v4wb_always_flags & \
276 v6wbi_always_flags) 278 v6wbi_always_flags & \
279 v7wbi_always_flags)
277 280
278#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f))) 281#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
279 282