Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Pull second set of ARM changes from Russell King:
 "This is the remainder of the ARM changes for this merge window.
  Included in this request are:

   - fixes for kprobes for big-endian support
   - fix tracing in soft_restart
   - avoid phys address overflow in kdump code
   - fix reporting of read-only pmd bits in kernel page table dump
   - remove unnecessary (and possibly buggy) call to outer_flush_all()
   - fix a three sparse warnings (missing header file for function
     prototypes)
   - fix pj4 crashing single zImage (thanks to arm-soc merging changes
     which enables this with knowledge that the corresponding fix had
     not even been submitted for my tree before the merge window opened)
   - vfp macro cleanups
   - dump register state on undefined instruction userspace faults when
     debugging"

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  Dump the registers on undefined instruction userspace faults
  ARM: 8018/1: Add {inc,dec}_preempt_count asm macros
  ARM: 8017/1: Move asm macro get_thread_info to asm/assembler.h
  ARM: 8016/1: Check cpu id in pj4_cp0_init.
  ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7
  ARM: add missing system_misc.h include to process.c
  ARM: 8009/1: dcscb.c: remove call to outer_flush_all()
  ARM: 8014/1: mm: fix reporting of read-only PMD bits
  ARM: 8012/1: kdump: Avoid overflow when converting pfn to physaddr
  ARM: 8010/1: avoid tracers in soft_restart
  ARM: kprobes-test: Workaround GAS .align bug
  ARM: kprobes-test: use <asm/opcodes.h> for Thumb instruction building
  ARM: kprobes-test: use <asm/opcodes.h> for ARM instruction building
  ARM: kprobes-test: use <asm/opcodes.h> for instruction accesses
  ARM: probes: fix instruction fetch order with <asm/opcodes.h>

2 files changed, 61 insertions, 0 deletions

diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 380ac4f20000..b974184f9941 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -23,6 +23,7 @@
 #include <asm/ptrace.h>
 #include <asm/domain.h>
 #include <asm/opcodes-virt.h>
+#include <asm/asm-offsets.h>
 
 #define IOMEM(x)        (x)
 
@@ -174,6 +175,47 @@
         restore_irqs_notrace \oldcpsr
         .endm
 
+/*
+ * Get current thread_info.
+ */
+        .macro  get_thread_info, rd
+ ARM(   mov     \rd, sp, lsr #13        )
+ THUMB( mov     \rd, sp                 )
+ THUMB( lsr     \rd, \rd, #13           )
+        mov     \rd, \rd, lsl #13
+        .endm
+
+/*
+ * Increment/decrement the preempt count.
+ */
+#ifdef CONFIG_PREEMPT_COUNT
+        .macro  inc_preempt_count, ti, tmp
+        ldr     \tmp, [\ti, #TI_PREEMPT]        @ get preempt count
+        add     \tmp, \tmp, #1                  @ increment it
+        str     \tmp, [\ti, #TI_PREEMPT]
+        .endm
+
+        .macro  dec_preempt_count, ti, tmp
+        ldr     \tmp, [\ti, #TI_PREEMPT]        @ get preempt count
+        sub     \tmp, \tmp, #1                  @ decrement it
+        str     \tmp, [\ti, #TI_PREEMPT]
+        .endm
+
+        .macro  dec_preempt_count_ti, ti, tmp
+        get_thread_info \ti
+        dec_preempt_count \ti, \tmp
+        .endm
+#else
+        .macro  inc_preempt_count, ti, tmp
+        .endm
+
+        .macro  dec_preempt_count, ti, tmp
+        .endm
+
+        .macro  dec_preempt_count_ti, ti, tmp
+        .endm
+#endif
+
 #define USER(x...)                              \
 9999:   x;                                      \
         .pushsection __ex_table,"a";            \
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 42f0889f0584..c651e3b26ec7 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -221,4 +221,23 @@ static inline int cpu_is_xsc3(void)
 #define cpu_is_xscale() 1
 #endif
 
+/*
+ * Marvell's PJ4 core is based on V7 version. It has some modification
+ * for coprocessor setting. For this reason, we need a way to distinguish
+ * it.
+ */
+#ifndef CONFIG_CPU_PJ4
+#define cpu_is_pj4()    0
+#else
+static inline int cpu_is_pj4(void)
+{
+        unsigned int id;
+
+        id = read_cpuid_id();
+        if ((id & 0xfffffff0) == 0x562f5840)
+                return 1;
+
+        return 0;
+}
+#endif
 #endif