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authorArnd Bergmann <arnd@arndb.de>2012-10-04 16:57:00 -0400
committerArnd Bergmann <arnd@arndb.de>2012-10-04 16:57:51 -0400
commitc37d6154c0b9163c27e53cc1d0be3867b4abd760 (patch)
tree7a24522c56d1cb284dff1d3c225bbdaba0901bb5 /arch/arm/include/debug
parente7a570ff7dff9af6e54ff5e580a61ec7652137a0 (diff)
parent8a1ab3155c2ac7fbe5f2038d6e26efeb607a1498 (diff)
Merge branch 'disintegrate-asm-generic' of git://git.infradead.org/users/dhowells/linux-headers into asm-generic
Patches from David Howells <dhowells@redhat.com>: This is to complete part of the UAPI disintegration for which the preparatory patches were pulled recently. Note that there are some fixup patches which are at the base of the branch aimed at you, plus all arches get the asm-generic branch merged in too. * 'disintegrate-asm-generic' of git://git.infradead.org/users/dhowells/linux-headers: UAPI: (Scripted) Disintegrate include/asm-generic UAPI: Fix conditional header installation handling (notably kvm_para.h on m68k) c6x: remove c6x signal.h UAPI: Split compound conditionals containing __KERNEL__ in Arm64 UAPI: Fix the guards on various asm/unistd.h files Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/include/debug')
-rw-r--r--arch/arm/include/debug/highbank.S17
-rw-r--r--arch/arm/include/debug/icedcc.S90
-rw-r--r--arch/arm/include/debug/mvebu.S25
-rw-r--r--arch/arm/include/debug/picoxcell.S35
-rw-r--r--arch/arm/include/debug/socfpga.S16
-rw-r--r--arch/arm/include/debug/vexpress.S84
6 files changed, 267 insertions, 0 deletions
diff --git a/arch/arm/include/debug/highbank.S b/arch/arm/include/debug/highbank.S
new file mode 100644
index 000000000000..8cad4322a5a2
--- /dev/null
+++ b/arch/arm/include/debug/highbank.S
@@ -0,0 +1,17 @@
1/*
2 * Debugging macro include header
3 *
4 * Copyright (C) 1994-1999 Russell King
5 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 .macro addruart,rp,rv,tmp
13 ldr \rv, =0xfee36000
14 ldr \rp, =0xfff36000
15 .endm
16
17#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/include/debug/icedcc.S b/arch/arm/include/debug/icedcc.S
new file mode 100644
index 000000000000..43afcb021fa3
--- /dev/null
+++ b/arch/arm/include/debug/icedcc.S
@@ -0,0 +1,90 @@
1/*
2 * arch/arm/include/debug/icedcc.S
3 *
4 * Copyright (C) 1994-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12 @@ debug using ARM EmbeddedICE DCC channel
13
14 .macro addruart, rp, rv, tmp
15 .endm
16
17#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
18
19 .macro senduart, rd, rx
20 mcr p14, 0, \rd, c0, c5, 0
21 .endm
22
23 .macro busyuart, rd, rx
241001:
25 mrc p14, 0, \rx, c0, c1, 0
26 tst \rx, #0x20000000
27 beq 1001b
28 .endm
29
30 .macro waituart, rd, rx
31 mov \rd, #0x2000000
321001:
33 subs \rd, \rd, #1
34 bmi 1002f
35 mrc p14, 0, \rx, c0, c1, 0
36 tst \rx, #0x20000000
37 bne 1001b
381002:
39 .endm
40
41#elif defined(CONFIG_CPU_XSCALE)
42
43 .macro senduart, rd, rx
44 mcr p14, 0, \rd, c8, c0, 0
45 .endm
46
47 .macro busyuart, rd, rx
481001:
49 mrc p14, 0, \rx, c14, c0, 0
50 tst \rx, #0x10000000
51 beq 1001b
52 .endm
53
54 .macro waituart, rd, rx
55 mov \rd, #0x10000000
561001:
57 subs \rd, \rd, #1
58 bmi 1002f
59 mrc p14, 0, \rx, c14, c0, 0
60 tst \rx, #0x10000000
61 bne 1001b
621002:
63 .endm
64
65#else
66
67 .macro senduart, rd, rx
68 mcr p14, 0, \rd, c1, c0, 0
69 .endm
70
71 .macro busyuart, rd, rx
721001:
73 mrc p14, 0, \rx, c0, c0, 0
74 tst \rx, #2
75 beq 1001b
76
77 .endm
78
79 .macro waituart, rd, rx
80 mov \rd, #0x2000000
811001:
82 subs \rd, \rd, #1
83 bmi 1002f
84 mrc p14, 0, \rx, c0, c0, 0
85 tst \rx, #2
86 bne 1001b
871002:
88 .endm
89
90#endif /* CONFIG_CPU_V6 */
diff --git a/arch/arm/include/debug/mvebu.S b/arch/arm/include/debug/mvebu.S
new file mode 100644
index 000000000000..865c6d02b332
--- /dev/null
+++ b/arch/arm/include/debug/mvebu.S
@@ -0,0 +1,25 @@
1/*
2 * Early serial output macro for Marvell SoC
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Lior Amsalem <alior@marvell.com>
7 * Gregory Clement <gregory.clement@free-electrons.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
15#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000
16
17 .macro addruart, rp, rv, tmp
18 ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE
19 ldr \rv, =ARMADA_370_XP_REGS_VIRT_BASE
20 orr \rp, \rp, #0x00012000
21 orr \rv, \rv, #0x00012000
22 .endm
23
24#define UART_SHIFT 2
25#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S
new file mode 100644
index 000000000000..7419deb1b948
--- /dev/null
+++ b/arch/arm/include/debug/picoxcell.S
@@ -0,0 +1,35 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
9 * accesses to the 8250.
10 */
11#include <linux/serial_reg.h>
12
13#define UART_SHIFT 2
14#define PICOXCELL_UART1_BASE 0x80230000
15#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000)
16
17 .macro addruart, rp, rv, tmp
18 ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)
19 ldr \rp, =PICOXCELL_UART1_BASE
20 .endm
21
22 .macro senduart,rd,rx
23 str \rd, [\rx, #UART_TX << UART_SHIFT]
24 .endm
25
26 .macro busyuart,rd,rx
271002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
28 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
29 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
30 bne 1002b
31 .endm
32
33 /* The UART's don't have any flow control IO's wired up. */
34 .macro waituart,rd,rx
35 .endm
diff --git a/arch/arm/include/debug/socfpga.S b/arch/arm/include/debug/socfpga.S
new file mode 100644
index 000000000000..d6f26d23374f
--- /dev/null
+++ b/arch/arm/include/debug/socfpga.S
@@ -0,0 +1,16 @@
1/*
2 * Copyright (C) 1994-1999 Russell King
3 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10 .macro addruart, rp, rv, tmp
11 mov \rp, #DEBUG_LL_UART_OFFSET
12 orr \rp, \rp, #0x00c00000
13 orr \rv, \rp, #0xfe000000 @ virtual base
14 orr \rp, \rp, #0xff000000 @ physical base
15 .endm
16
diff --git a/arch/arm/include/debug/vexpress.S b/arch/arm/include/debug/vexpress.S
new file mode 100644
index 000000000000..9f509f55d078
--- /dev/null
+++ b/arch/arm/include/debug/vexpress.S
@@ -0,0 +1,84 @@
1/* arch/arm/mach-realview/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#define DEBUG_LL_PHYS_BASE 0x10000000
14#define DEBUG_LL_UART_OFFSET 0x00009000
15
16#define DEBUG_LL_PHYS_BASE_RS1 0x1c000000
17#define DEBUG_LL_UART_OFFSET_RS1 0x00090000
18
19#define DEBUG_LL_VIRT_BASE 0xf8000000
20
21#if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT)
22
23 .macro addruart,rp,rv,tmp
24
25 @ Make an educated guess regarding the memory map:
26 @ - the original A9 core tile, which has MPCore peripherals
27 @ located at 0x1e000000, should use UART at 0x10009000
28 @ - all other (RS1 complaint) tiles use UART mapped
29 @ at 0x1c090000
30 mrc p15, 4, \tmp, c15, c0, 0
31 cmp \tmp, #0x1e000000
32
33 @ Original memory map
34 moveq \rp, #DEBUG_LL_UART_OFFSET
35 orreq \rv, \rp, #DEBUG_LL_VIRT_BASE
36 orreq \rp, \rp, #DEBUG_LL_PHYS_BASE
37
38 @ RS1 memory map
39 movne \rp, #DEBUG_LL_UART_OFFSET_RS1
40 orrne \rv, \rp, #DEBUG_LL_VIRT_BASE
41 orrne \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1
42
43 .endm
44
45#include <asm/hardware/debug-pl01x.S>
46
47#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_CA9)
48
49 .macro addruart,rp,rv,tmp
50 mov \rp, #DEBUG_LL_UART_OFFSET
51 orr \rv, \rp, #DEBUG_LL_VIRT_BASE
52 orr \rp, \rp, #DEBUG_LL_PHYS_BASE
53 .endm
54
55#include <asm/hardware/debug-pl01x.S>
56
57#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_RS1)
58
59 .macro addruart,rp,rv,tmp
60 mov \rp, #DEBUG_LL_UART_OFFSET_RS1
61 orr \rv, \rp, #DEBUG_LL_VIRT_BASE
62 orr \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1
63 .endm
64
65#include <asm/hardware/debug-pl01x.S>
66
67#else /* CONFIG_DEBUG_LL_UART_NONE */
68
69 .macro addruart, rp, rv, tmp
70 /* Safe dummy values */
71 mov \rp, #0
72 mov \rv, #DEBUG_LL_VIRT_BASE
73 .endm
74
75 .macro senduart,rd,rx
76 .endm
77
78 .macro waituart,rd,rx
79 .endm
80
81 .macro busyuart,rd,rx
82 .endm
83
84#endif
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