diff options
author | Ingo Molnar <mingo@elte.hu> | 2010-08-02 02:29:56 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2010-08-02 02:31:54 -0400 |
commit | 3772b734720e1a3f2dc1d95cfdfaa5332f4ccf01 (patch) | |
tree | a1a8cc85948c086aa12a1d8014151a7ca7c04ea8 /arch/arm/include/asm | |
parent | 9fc3af467d0749989518a23f7289a6f44e5cb214 (diff) | |
parent | 9fe6206f400646a2322096b56c59891d530e8d51 (diff) |
Merge commit 'v2.6.35' into perf/core
Conflicts:
tools/perf/Makefile
tools/perf/util/hist.c
Merge reason: Resolve the conflicts and update to latest upstream.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r-- | arch/arm/include/asm/io.h | 50 |
1 files changed, 32 insertions, 18 deletions
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index c980156f3263..1261b1f928d9 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/types.h> | 26 | #include <linux/types.h> |
27 | #include <asm/byteorder.h> | 27 | #include <asm/byteorder.h> |
28 | #include <asm/memory.h> | 28 | #include <asm/memory.h> |
29 | #include <asm/system.h> | ||
29 | 30 | ||
30 | /* | 31 | /* |
31 | * ISA I/O bus memory addresses are 1:1 with the physical address. | 32 | * ISA I/O bus memory addresses are 1:1 with the physical address. |
@@ -179,25 +180,38 @@ extern void _memset_io(volatile void __iomem *, int, size_t); | |||
179 | * IO port primitives for more information. | 180 | * IO port primitives for more information. |
180 | */ | 181 | */ |
181 | #ifdef __mem_pci | 182 | #ifdef __mem_pci |
182 | #define readb(c) ({ __u8 __v = __raw_readb(__mem_pci(c)); __v; }) | 183 | #define readb_relaxed(c) ({ u8 __v = __raw_readb(__mem_pci(c)); __v; }) |
183 | #define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \ | 184 | #define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \ |
184 | __raw_readw(__mem_pci(c))); __v; }) | 185 | __raw_readw(__mem_pci(c))); __v; }) |
185 | #define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \ | 186 | #define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \ |
186 | __raw_readl(__mem_pci(c))); __v; }) | 187 | __raw_readl(__mem_pci(c))); __v; }) |
187 | #define readb_relaxed(addr) readb(addr) | 188 | |
188 | #define readw_relaxed(addr) readw(addr) | 189 | #define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c))) |
189 | #define readl_relaxed(addr) readl(addr) | 190 | #define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ |
191 | cpu_to_le16(v),__mem_pci(c))) | ||
192 | #define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ | ||
193 | cpu_to_le32(v),__mem_pci(c))) | ||
194 | |||
195 | #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE | ||
196 | #define __iormb() rmb() | ||
197 | #define __iowmb() wmb() | ||
198 | #else | ||
199 | #define __iormb() do { } while (0) | ||
200 | #define __iowmb() do { } while (0) | ||
201 | #endif | ||
202 | |||
203 | #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) | ||
204 | #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) | ||
205 | #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) | ||
206 | |||
207 | #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); }) | ||
208 | #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) | ||
209 | #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) | ||
190 | 210 | ||
191 | #define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) | 211 | #define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) |
192 | #define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) | 212 | #define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) |
193 | #define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) | 213 | #define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) |
194 | 214 | ||
195 | #define writeb(v,c) __raw_writeb(v,__mem_pci(c)) | ||
196 | #define writew(v,c) __raw_writew((__force __u16) \ | ||
197 | cpu_to_le16(v),__mem_pci(c)) | ||
198 | #define writel(v,c) __raw_writel((__force __u32) \ | ||
199 | cpu_to_le32(v),__mem_pci(c)) | ||
200 | |||
201 | #define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l) | 215 | #define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l) |
202 | #define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l) | 216 | #define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l) |
203 | #define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l) | 217 | #define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l) |
@@ -244,13 +258,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t); | |||
244 | * io{read,write}{8,16,32} macros | 258 | * io{read,write}{8,16,32} macros |
245 | */ | 259 | */ |
246 | #ifndef ioread8 | 260 | #ifndef ioread8 |
247 | #define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; }) | 261 | #define ioread8(p) ({ unsigned int __v = __raw_readb(p); __iormb(); __v; }) |
248 | #define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __v; }) | 262 | #define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; }) |
249 | #define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __v; }) | 263 | #define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; }) |
250 | 264 | ||
251 | #define iowrite8(v,p) __raw_writeb(v, p) | 265 | #define iowrite8(v,p) ({ __iowmb(); (void)__raw_writeb(v, p); }) |
252 | #define iowrite16(v,p) __raw_writew((__force __u16)cpu_to_le16(v), p) | 266 | #define iowrite16(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); }) |
253 | #define iowrite32(v,p) __raw_writel((__force __u32)cpu_to_le32(v), p) | 267 | #define iowrite32(v,p) ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_le32(v), p); }) |
254 | 268 | ||
255 | #define ioread8_rep(p,d,c) __raw_readsb(p,d,c) | 269 | #define ioread8_rep(p,d,c) __raw_readsb(p,d,c) |
256 | #define ioread16_rep(p,d,c) __raw_readsw(p,d,c) | 270 | #define ioread16_rep(p,d,c) __raw_readsw(p,d,c) |