diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-11-27 15:01:25 -0500 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-11-27 15:01:25 -0500 |
commit | 459d2a9f5fcf125ba736f7843189ccdfba11b1ff (patch) | |
tree | 6664f0ae653081521a3e1df0c506a2532ae6168e /arch/arm/include/asm/vfpmacros.h | |
parent | 1428c20f7c38e9fbf59923d1b9615ebdaf2862b7 (diff) | |
parent | 9489e9dcae718d5fde988e4a684a0f55b5f94d17 (diff) |
Merge tag 'v3.7-rc7' into asoc-ux500
Linux 3.7-rc7
Diffstat (limited to 'arch/arm/include/asm/vfpmacros.h')
-rw-r--r-- | arch/arm/include/asm/vfpmacros.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h index 6a6f1e485f41..301c1db3e99b 100644 --- a/arch/arm/include/asm/vfpmacros.h +++ b/arch/arm/include/asm/vfpmacros.h | |||
@@ -27,9 +27,9 @@ | |||
27 | #if __LINUX_ARM_ARCH__ <= 6 | 27 | #if __LINUX_ARM_ARCH__ <= 6 |
28 | ldr \tmp, =elf_hwcap @ may not have MVFR regs | 28 | ldr \tmp, =elf_hwcap @ may not have MVFR regs |
29 | ldr \tmp, [\tmp, #0] | 29 | ldr \tmp, [\tmp, #0] |
30 | tst \tmp, #HWCAP_VFPv3D16 | 30 | tst \tmp, #HWCAP_VFPD32 |
31 | ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} | 31 | ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} |
32 | addne \base, \base, #32*4 @ step over unused register space | 32 | addeq \base, \base, #32*4 @ step over unused register space |
33 | #else | 33 | #else |
34 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 | 34 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
35 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field | 35 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
@@ -51,9 +51,9 @@ | |||
51 | #if __LINUX_ARM_ARCH__ <= 6 | 51 | #if __LINUX_ARM_ARCH__ <= 6 |
52 | ldr \tmp, =elf_hwcap @ may not have MVFR regs | 52 | ldr \tmp, =elf_hwcap @ may not have MVFR regs |
53 | ldr \tmp, [\tmp, #0] | 53 | ldr \tmp, [\tmp, #0] |
54 | tst \tmp, #HWCAP_VFPv3D16 | 54 | tst \tmp, #HWCAP_VFPD32 |
55 | stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} | 55 | stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} |
56 | addne \base, \base, #32*4 @ step over unused register space | 56 | addeq \base, \base, #32*4 @ step over unused register space |
57 | #else | 57 | #else |
58 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 | 58 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
59 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field | 59 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |