diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-11-20 16:06:43 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-11-24 12:41:36 -0500 |
commit | 26a26d329688ab018e068b412b03d43d7c299f0a (patch) | |
tree | f33ea6faa4f8d9409098654354548fa28c7b41ad /arch/arm/include/asm/system.h | |
parent | acaac256b3a14a09ab278409a72d119f2d75b02b (diff) |
ARM: dma-mapping: switch ARMv7 DMA mappings to retain 'memory' attribute
On ARMv7, it is invalid to map the same physical address multiple times
with different memory types. Since system RAM is already mapped as
'memory', subsequent remapping of it must retain this attribute.
However, DMA memory maps it as "strongly ordered". Fix this by introducing
'pgprot_dmacoherent()' which provides the necessary page table bits for
DMA mappings.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/include/asm/system.h')
-rw-r--r-- | arch/arm/include/asm/system.h | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index d65b2f5bf41f..058e7e90881d 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h | |||
@@ -138,21 +138,26 @@ extern unsigned int user_debug; | |||
138 | #define dmb() __asm__ __volatile__ ("" : : : "memory") | 138 | #define dmb() __asm__ __volatile__ ("" : : : "memory") |
139 | #endif | 139 | #endif |
140 | 140 | ||
141 | #ifndef CONFIG_SMP | 141 | #if __LINUX_ARM_ARCH__ >= 7 || defined(CONFIG_SMP) |
142 | #define mb() dmb() | ||
143 | #define rmb() dmb() | ||
144 | #define wmb() dmb() | ||
145 | #else | ||
142 | #define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) | 146 | #define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
143 | #define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) | 147 | #define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
144 | #define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) | 148 | #define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
149 | #endif | ||
150 | |||
151 | #ifndef CONFIG_SMP | ||
145 | #define smp_mb() barrier() | 152 | #define smp_mb() barrier() |
146 | #define smp_rmb() barrier() | 153 | #define smp_rmb() barrier() |
147 | #define smp_wmb() barrier() | 154 | #define smp_wmb() barrier() |
148 | #else | 155 | #else |
149 | #define mb() dmb() | 156 | #define smp_mb() mb() |
150 | #define rmb() dmb() | 157 | #define smp_rmb() rmb() |
151 | #define wmb() dmb() | 158 | #define smp_wmb() wmb() |
152 | #define smp_mb() dmb() | ||
153 | #define smp_rmb() dmb() | ||
154 | #define smp_wmb() dmb() | ||
155 | #endif | 159 | #endif |
160 | |||
156 | #define read_barrier_depends() do { } while(0) | 161 | #define read_barrier_depends() do { } while(0) |
157 | #define smp_read_barrier_depends() do { } while(0) | 162 | #define smp_read_barrier_depends() do { } while(0) |
158 | 163 | ||