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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-06-29 06:44:43 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-06-29 06:44:43 -0400 |
commit | 3c0c01ab742ddfaf6b6f2d64b890e77cda4b7727 (patch) | |
tree | d0f196c53d209f44190fd8a6481823b7770866e6 /arch/arm/include/asm/smp_plat.h | |
parent | cbd379b10019617457bda31eb243890f4377fa3e (diff) | |
parent | 809e660f438fc5a69bf57630a85bcd8112263f37 (diff) |
Merge branch 'devel-stable' into for-next
Conflicts:
arch/arm/Makefile
arch/arm/include/asm/glue-proc.h
Diffstat (limited to 'arch/arm/include/asm/smp_plat.h')
-rw-r--r-- | arch/arm/include/asm/smp_plat.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h index e78983202737..6462a721ebd4 100644 --- a/arch/arm/include/asm/smp_plat.h +++ b/arch/arm/include/asm/smp_plat.h | |||
@@ -26,6 +26,9 @@ static inline bool is_smp(void) | |||
26 | } | 26 | } |
27 | 27 | ||
28 | /* all SMP configurations have the extended CPUID registers */ | 28 | /* all SMP configurations have the extended CPUID registers */ |
29 | #ifndef CONFIG_MMU | ||
30 | #define tlb_ops_need_broadcast() 0 | ||
31 | #else | ||
29 | static inline int tlb_ops_need_broadcast(void) | 32 | static inline int tlb_ops_need_broadcast(void) |
30 | { | 33 | { |
31 | if (!is_smp()) | 34 | if (!is_smp()) |
@@ -33,6 +36,7 @@ static inline int tlb_ops_need_broadcast(void) | |||
33 | 36 | ||
34 | return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; | 37 | return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; |
35 | } | 38 | } |
39 | #endif | ||
36 | 40 | ||
37 | #if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7 | 41 | #if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7 |
38 | #define cache_ops_need_broadcast() 0 | 42 | #define cache_ops_need_broadcast() 0 |
@@ -66,4 +70,22 @@ static inline int get_logical_index(u32 mpidr) | |||
66 | return -EINVAL; | 70 | return -EINVAL; |
67 | } | 71 | } |
68 | 72 | ||
73 | /* | ||
74 | * NOTE ! Assembly code relies on the following | ||
75 | * structure memory layout in order to carry out load | ||
76 | * multiple from its base address. For more | ||
77 | * information check arch/arm/kernel/sleep.S | ||
78 | */ | ||
79 | struct mpidr_hash { | ||
80 | u32 mask; /* used by sleep.S */ | ||
81 | u32 shift_aff[3]; /* used by sleep.S */ | ||
82 | u32 bits; | ||
83 | }; | ||
84 | |||
85 | extern struct mpidr_hash mpidr_hash; | ||
86 | |||
87 | static inline u32 mpidr_hash_size(void) | ||
88 | { | ||
89 | return 1 << mpidr_hash.bits; | ||
90 | } | ||
69 | #endif | 91 | #endif |