diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2011-11-22 12:30:29 -0500 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2011-12-08 05:30:39 -0500 |
commit | da02877987e6e173ebba137d4e1e155e1f1151cd (patch) | |
tree | 8035bb1fb7def068ed2fd13d5d11ec5857c7d338 /arch/arm/include/asm/pgtable-3level.h | |
parent | dcfdae04bd92e8a2ea155db0e21e3bddc09e0a89 (diff) |
ARM: LPAE: Page table maintenance for the 3-level format
This patch modifies the pgd/pmd/pte manipulation functions to support
the 3-level page table format. Since there is no need for an 'ext'
argument to cpu_set_pte_ext(), this patch conditionally defines a
different prototype for this function when CONFIG_ARM_LPAE.
The patch also introduces the L_PGD_SWAPPER flag to mark pgd entries
pointing to pmd tables pre-allocated in the swapper_pg_dir and avoid
trying to free them at run-time. This flag is 0 with the classic page
table format.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/include/asm/pgtable-3level.h')
-rw-r--r-- | arch/arm/include/asm/pgtable-3level.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h index 79bf0acc40db..759af70f9a0a 100644 --- a/arch/arm/include/asm/pgtable-3level.h +++ b/arch/arm/include/asm/pgtable-3level.h | |||
@@ -99,4 +99,57 @@ | |||
99 | #define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 3) << 2) /* normal inner write-back */ | 99 | #define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 3) << 2) /* normal inner write-back */ |
100 | #define L_PTE_MT_MASK (_AT(pteval_t, 7) << 2) | 100 | #define L_PTE_MT_MASK (_AT(pteval_t, 7) << 2) |
101 | 101 | ||
102 | /* | ||
103 | * Software PGD flags. | ||
104 | */ | ||
105 | #define L_PGD_SWAPPER (_AT(pgdval_t, 1) << 55) /* swapper_pg_dir entry */ | ||
106 | |||
107 | #ifndef __ASSEMBLY__ | ||
108 | |||
109 | #define pud_none(pud) (!pud_val(pud)) | ||
110 | #define pud_bad(pud) (!(pud_val(pud) & 2)) | ||
111 | #define pud_present(pud) (pud_val(pud)) | ||
112 | |||
113 | #define pud_clear(pudp) \ | ||
114 | do { \ | ||
115 | *pudp = __pud(0); \ | ||
116 | clean_pmd_entry(pudp); \ | ||
117 | } while (0) | ||
118 | |||
119 | #define set_pud(pudp, pud) \ | ||
120 | do { \ | ||
121 | *pudp = pud; \ | ||
122 | flush_pmd_entry(pudp); \ | ||
123 | } while (0) | ||
124 | |||
125 | static inline pmd_t *pud_page_vaddr(pud_t pud) | ||
126 | { | ||
127 | return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK); | ||
128 | } | ||
129 | |||
130 | /* Find an entry in the second-level page table.. */ | ||
131 | #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) | ||
132 | static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr) | ||
133 | { | ||
134 | return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr); | ||
135 | } | ||
136 | |||
137 | #define pmd_bad(pmd) (!(pmd_val(pmd) & 2)) | ||
138 | |||
139 | #define copy_pmd(pmdpd,pmdps) \ | ||
140 | do { \ | ||
141 | *pmdpd = *pmdps; \ | ||
142 | flush_pmd_entry(pmdpd); \ | ||
143 | } while (0) | ||
144 | |||
145 | #define pmd_clear(pmdp) \ | ||
146 | do { \ | ||
147 | *pmdp = __pmd(0); \ | ||
148 | clean_pmd_entry(pmdp); \ | ||
149 | } while (0) | ||
150 | |||
151 | #define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,__pte(pte_val(pte)|(ext))) | ||
152 | |||
153 | #endif /* __ASSEMBLY__ */ | ||
154 | |||
102 | #endif /* _ASM_PGTABLE_3LEVEL_H */ | 155 | #endif /* _ASM_PGTABLE_3LEVEL_H */ |