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authorCatalin Marinas <catalin.marinas@arm.com>2011-11-22 12:30:29 -0500
committerCatalin Marinas <catalin.marinas@arm.com>2011-12-08 05:30:39 -0500
commitda02877987e6e173ebba137d4e1e155e1f1151cd (patch)
tree8035bb1fb7def068ed2fd13d5d11ec5857c7d338 /arch/arm/include/asm/pgalloc.h
parentdcfdae04bd92e8a2ea155db0e21e3bddc09e0a89 (diff)
ARM: LPAE: Page table maintenance for the 3-level format
This patch modifies the pgd/pmd/pte manipulation functions to support the 3-level page table format. Since there is no need for an 'ext' argument to cpu_set_pte_ext(), this patch conditionally defines a different prototype for this function when CONFIG_ARM_LPAE. The patch also introduces the L_PGD_SWAPPER flag to mark pgd entries pointing to pmd tables pre-allocated in the swapper_pg_dir and avoid trying to free them at run-time. This flag is 0 with the classic page table format. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/include/asm/pgalloc.h')
-rw-r--r--arch/arm/include/asm/pgalloc.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h
index 7418894a737f..943504f53f57 100644
--- a/arch/arm/include/asm/pgalloc.h
+++ b/arch/arm/include/asm/pgalloc.h
@@ -25,6 +25,26 @@
25#define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER)) 25#define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
26#define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL)) 26#define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
27 27
28#ifdef CONFIG_ARM_LPAE
29
30static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
31{
32 return (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT);
33}
34
35static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
36{
37 BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
38 free_page((unsigned long)pmd);
39}
40
41static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
42{
43 set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE));
44}
45
46#else /* !CONFIG_ARM_LPAE */
47
28/* 48/*
29 * Since we have only two-level page tables, these are trivial 49 * Since we have only two-level page tables, these are trivial
30 */ 50 */
@@ -32,6 +52,8 @@
32#define pmd_free(mm, pmd) do { } while (0) 52#define pmd_free(mm, pmd) do { } while (0)
33#define pud_populate(mm,pmd,pte) BUG() 53#define pud_populate(mm,pmd,pte) BUG()
34 54
55#endif /* CONFIG_ARM_LPAE */
56
35extern pgd_t *pgd_alloc(struct mm_struct *mm); 57extern pgd_t *pgd_alloc(struct mm_struct *mm);
36extern void pgd_free(struct mm_struct *mm, pgd_t *pgd); 58extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
37 59
@@ -109,7 +131,9 @@ static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte,
109{ 131{
110 pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot; 132 pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot;
111 pmdp[0] = __pmd(pmdval); 133 pmdp[0] = __pmd(pmdval);
134#ifndef CONFIG_ARM_LPAE
112 pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t)); 135 pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
136#endif
113 flush_pmd_entry(pmdp); 137 flush_pmd_entry(pmdp);
114} 138}
115 139