aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/include/asm/hardware
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-06 21:15:25 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-06 21:15:25 -0500
commit770e1b035dcb6ec3f8ee69dda0815dd1e220a683 (patch)
treee6d36abfdb053fbc722aea8d7e946d6d1b93c7e1 /arch/arm/include/asm/hardware
parentd3d0b024348c040f0d6851e2e59fc961677d5169 (diff)
parent7b9dd47136c07ffd883aff6926c7b281e4c1eea4 (diff)
Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
* 'for-linus' of git://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: (207 commits) ARM: 7267/1: Remove BUILD_BUG_ON from asm/bug.h ARM: 7269/1: mach-sa1100: fix sched_clock breakage ARM: 7198/1: arm/imx6: add restart support for imx6q ARM: restart: remove the now empty arch_reset() ARM: restart: remove comments about adding code to arch_reset() ARM: restart: lpc32xx & u300: remove unnecessary printk ARM: restart: plat-samsung: remove plat/reset.h and s5p_reset_hook ARM: restart: w90x900: use new restart hook ARM: restart: Versatile Express: use new restart hook ARM: restart: versatile: use new restart hook ARM: restart: u300: use new restart hook ARM: restart: tegra: use new restart hook ARM: restart: spear: use new restart hook ARM: restart: shark: use new restart hook ARM: restart: sa1100: use new restart hook ARM: 7252/1: restart: S5PV210: use new restart hook ARM: 7251/1: restart: S5PC100: use new restart hook ARM: 7250/1: restart: S5P64X0: use new restart hook ARM: 7266/1: restart: S3C64XX: use new restart hook ARM: 7265/1: restart: S3C24XX: use new restart hook ... Fix up trivial conflict in arch/arm/mm/init.c due to removal of memblock_init() clashing with the movement of the sorting of the meminfo array.
Diffstat (limited to 'arch/arm/include/asm/hardware')
-rw-r--r--arch/arm/include/asm/hardware/entry-macro-gic.S60
-rw-r--r--arch/arm/include/asm/hardware/gic.h26
-rw-r--r--arch/arm/include/asm/hardware/iop3xx.h1
-rw-r--r--arch/arm/include/asm/hardware/vic.h10
4 files changed, 19 insertions, 78 deletions
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S
deleted file mode 100644
index 74ebc803904d..000000000000
--- a/arch/arm/include/asm/hardware/entry-macro-gic.S
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * arch/arm/include/asm/hardware/entry-macro-gic.S
3 *
4 * Low-level IRQ helper macros for GIC
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/gic.h>
12
13#ifndef HAVE_GET_IRQNR_PREAMBLE
14 .macro get_irqnr_preamble, base, tmp
15 ldr \base, =gic_cpu_base_addr
16 ldr \base, [\base]
17 .endm
18#endif
19
20/*
21 * The interrupt numbering scheme is defined in the
22 * interrupt controller spec. To wit:
23 *
24 * Interrupts 0-15 are IPI
25 * 16-31 are local. We allow 30 to be used for the watchdog.
26 * 32-1020 are global
27 * 1021-1022 are reserved
28 * 1023 is "spurious" (no interrupt)
29 *
30 * A simple read from the controller will tell us the number of the highest
31 * priority enabled interrupt. We then just need to check whether it is in the
32 * valid range for an IRQ (30-1020 inclusive).
33 */
34
35 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
36
37 ldr \irqstat, [\base, #GIC_CPU_INTACK]
38 /* bits 12-10 = src CPU, 9-0 = int # */
39
40 ldr \tmp, =1021
41 bic \irqnr, \irqstat, #0x1c00
42 cmp \irqnr, #15
43 cmpcc \irqnr, \irqnr
44 cmpne \irqnr, \tmp
45 cmpcs \irqnr, \irqnr
46 .endm
47
48/* We assume that irqstat (the raw value of the IRQ acknowledge
49 * register) is preserved from the macro above.
50 * If there is an IPI, we immediately signal end of interrupt on the
51 * controller, since this requires the original irqstat value which
52 * we won't easily be able to recreate later.
53 */
54
55 .macro test_for_ipi, irqnr, irqstat, base, tmp
56 bic \irqnr, \irqstat, #0x1c00
57 cmp \irqnr, #16
58 strcc \irqstat, [\base, #GIC_CPU_EOI]
59 cmpcs \irqnr, \irqnr
60 .endm
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 3e91f22046f5..4bdfe0018696 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -36,30 +36,22 @@
36#include <linux/irqdomain.h> 36#include <linux/irqdomain.h>
37struct device_node; 37struct device_node;
38 38
39extern void __iomem *gic_cpu_base_addr;
40extern struct irq_chip gic_arch_extn; 39extern struct irq_chip gic_arch_extn;
41 40
42void gic_init(unsigned int, int, void __iomem *, void __iomem *); 41void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
42 u32 offset);
43int gic_of_init(struct device_node *node, struct device_node *parent); 43int gic_of_init(struct device_node *node, struct device_node *parent);
44void gic_secondary_init(unsigned int); 44void gic_secondary_init(unsigned int);
45void gic_handle_irq(struct pt_regs *regs);
45void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); 46void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
46void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); 47void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
47 48
48struct gic_chip_data { 49static inline void gic_init(unsigned int nr, int start,
49 void __iomem *dist_base; 50 void __iomem *dist , void __iomem *cpu)
50 void __iomem *cpu_base; 51{
51#ifdef CONFIG_CPU_PM 52 gic_init_bases(nr, start, dist, cpu, 0);
52 u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)]; 53}
53 u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)]; 54
54 u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
55 u32 __percpu *saved_ppi_enable;
56 u32 __percpu *saved_ppi_conf;
57#endif
58#ifdef CONFIG_IRQ_DOMAIN
59 struct irq_domain domain;
60#endif
61 unsigned int gic_irqs;
62};
63#endif 55#endif
64 56
65#endif 57#endif
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 5daea2961d48..077c32326c63 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -234,6 +234,7 @@ extern int iop3xx_get_init_atu(void);
234void iop3xx_map_io(void); 234void iop3xx_map_io(void);
235void iop_init_cp6_handler(void); 235void iop_init_cp6_handler(void);
236void iop_init_time(unsigned long tickrate); 236void iop_init_time(unsigned long tickrate);
237void iop3xx_restart(char, const char *);
237 238
238static inline u32 read_tmr0(void) 239static inline u32 read_tmr0(void)
239{ 240{
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 5d72550a8097..f42ebd619590 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -41,7 +41,15 @@
41#define VIC_PL192_VECT_ADDR 0xF00 41#define VIC_PL192_VECT_ADDR 0xF00
42 42
43#ifndef __ASSEMBLY__ 43#ifndef __ASSEMBLY__
44#include <linux/compiler.h>
45#include <linux/types.h>
46
47struct device_node;
48struct pt_regs;
49
44void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); 50void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
45#endif 51int vic_of_init(struct device_node *node, struct device_node *parent);
52void vic_handle_irq(struct pt_regs *regs);
46 53
54#endif /* __ASSEMBLY__ */
47#endif 55#endif