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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-12-04 11:01:03 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-12-14 14:21:40 -0500
commit384895330e0f3954d9478fd0853145f9c169df12 (patch)
treec90f70f4e070b640a1f1f2a76cf4acf864354093 /arch/arm/include/asm/hardware/gic.h
parentb580b899dd05a007ad232ee49a07b32d91876462 (diff)
ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init
We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/hardware/gic.h')
-rw-r--r--arch/arm/include/asm/hardware/gic.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 387c6ae55673..48876a3fbda8 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -33,8 +33,8 @@
33#define GIC_DIST_SOFTINT 0xf00 33#define GIC_DIST_SOFTINT 0xf00
34 34
35#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
36void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
37void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); 36void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
37void gic_secondary_init(unsigned int);
38void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); 38void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
39void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); 39void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
40#endif 40#endif