[ARM] 5320/1: fix assembly constraints in implementation of do_div()

Those inline assembly segments using the umlal instruction must have
the & modifier so to be sure that a purely input register won't alias
one of the registers used as input+output.  In most cases, the inputs
are still used after the outputs are touched, and most binutil versions
insist on "rdhi, rdlo and rm must all be different" even for ARMv6+.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/arm/include/asm/div64.h b/arch/arm/include/asm/div64.h
index 5001390be958..d3f0a9eee9f6 100644
--- a/arch/arm/include/asm/div64.h
+++ b/arch/arm/include/asm/div64.h
@@ -165,7 +165,7 @@
                         __res = __m;                                    \
                         asm (   "umlal  %Q0, %R0, %Q1, %Q2\n\t"         \
                                 "mov    %Q0, #0"                        \
-                                : "+r" (__res)                          \
+                                : "+&r" (__res)                         \
                                 : "r" (__m), "r" (__n)                  \
                                 : "cc" );                               \
                 } else {                                                \
@@ -182,7 +182,7 @@
                                 "umlal  %R0, %Q0, %Q1, %R2\n\t"         \
                                 "mov    %R0, #0\n\t"                    \
                                 "umlal  %Q0, %R0, %R1, %R2"             \
-                                : "+r" (__res)                          \
+                                : "+&r" (__res)                         \
                                 : "r" (__m), "r" (__n)                  \
                                 : "cc" );                               \
                 } else {                                                \
@@ -192,7 +192,7 @@
                                 "adds   %Q0, %1, %Q0\n\t"               \
                                 "adc    %R0, %R0, #0\n\t"               \
                                 "umlal  %Q0, %R0, %R2, %R3"             \
-                                : "+r" (__res), "+r" (__z)              \
+                                : "+&r" (__res), "+&r" (__z)            \
                                 : "r" (__m), "r" (__n)                  \
                                 : "cc" );                               \
                 }                                                       \