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| author | Michal Marek <mmarek@suse.cz> | 2010-08-20 07:53:08 -0400 |
|---|---|---|
| committer | Michal Marek <mmarek@suse.cz> | 2010-08-20 07:53:08 -0400 |
| commit | e981b060767b3c4ac9393ad8d2558d648e35dfcb (patch) | |
| tree | 9c05eaec3072be3645dda61d35085d152b9d5954 /arch/arm/include/asm/cache.h | |
| parent | 3c955b407a084810f57260d61548cc92c14bc627 (diff) | |
| parent | da5cabf80e2433131bf0ed8993abc0f7ea618c73 (diff) | |
Merge commit 'v2.6.36-rc1' into kbuild/rc-fixes
Diffstat (limited to 'arch/arm/include/asm/cache.h')
| -rw-r--r-- | arch/arm/include/asm/cache.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 66c160b8547f..9d6122096fbe 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h | |||
| @@ -14,7 +14,7 @@ | |||
| 14 | * cache before the transfer is done, causing old data to be seen by | 14 | * cache before the transfer is done, causing old data to be seen by |
| 15 | * the CPU. | 15 | * the CPU. |
| 16 | */ | 16 | */ |
| 17 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | 17 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES |
| 18 | 18 | ||
| 19 | /* | 19 | /* |
| 20 | * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers. | 20 | * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers. |