ARM: Add base support for ARMv7-M

This patch adds the base support for the ARMv7-M
architecture. It consists of the corresponding arch/arm/mm/ files and
various #ifdef's around the kernel. Exception handling is implemented by
a subsequent patch.

[ukleinek: squash in some changes originating from commit

b5717ba (Cortex-M3: Add support for the Microcontroller Prototyping System)

from the v2.6.33-arm1 patch stack, port to post 3.6, drop zImage
support, drop reorganisation of pt_regs, assert CONFIG_CPU_V7M doesn't
leak into installed headers and a few cosmetic changes]

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Jonathan Austin <jonathan.austin@arm.com>
Tested-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

1 files changed, 16 insertions, 1 deletions

diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 05ee9eebad6b..a5fef710af32 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -136,7 +136,11 @@
  * assumes FIQs are enabled, and that the processor is in SVC mode.
  */
         .macro  save_and_disable_irqs, oldcpsr
+#ifdef CONFIG_CPU_V7M
+        mrs     \oldcpsr, primask
+#else
         mrs     \oldcpsr, cpsr
+#endif
         disable_irq
         .endm
 
@@ -150,7 +154,11 @@
  * guarantee that this will preserve the flags.
  */
         .macro  restore_irqs_notrace, oldcpsr
+#ifdef CONFIG_CPU_V7M
+        msr     primask, \oldcpsr
+#else
         msr     cpsr_c, \oldcpsr
+#endif
         .endm
 
         .macro restore_irqs, oldcpsr
@@ -229,7 +237,14 @@
 #endif
         .endm
 
-#ifdef CONFIG_THUMB2_KERNEL
+#if defined(CONFIG_CPU_V7M)
+        /*
+         * setmode is used to assert to be in svc mode during boot. For v7-M
+         * this is done in __v7m_setup, so setmode can be empty here.
+         */
+        .macro  setmode, mode, reg
+        .endm
+#elif defined(CONFIG_THUMB2_KERNEL)
         .macro  setmode, mode, reg
         mov     \reg, #\mode
         msr     cpsr_c, \reg