diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-05-21 10:15:24 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-05-21 10:15:24 -0400 |
commit | 4175160b065e74572819a320dcd34129224a4e1c (patch) | |
tree | 3298e2c9a7c7db33bf28617875e5429e17eec61c /arch/arm/common | |
parent | ddf90a2ff2c4a9da99acc898a4afeab3e4251fcd (diff) | |
parent | 0ec8e7aa8f63f0cacd545fcd7f40f93fde2c0e6e (diff) |
Merge branch 'misc' into for-linus
Conflicts:
arch/arm/kernel/ptrace.c
Diffstat (limited to 'arch/arm/common')
-rw-r--r-- | arch/arm/common/vic.c | 56 |
1 files changed, 31 insertions, 25 deletions
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index 7e288f96cedf..e0d538803cc3 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c | |||
@@ -39,6 +39,7 @@ | |||
39 | * struct vic_device - VIC PM device | 39 | * struct vic_device - VIC PM device |
40 | * @irq: The IRQ number for the base of the VIC. | 40 | * @irq: The IRQ number for the base of the VIC. |
41 | * @base: The register base for the VIC. | 41 | * @base: The register base for the VIC. |
42 | * @valid_sources: A bitmask of valid interrupts | ||
42 | * @resume_sources: A bitmask of interrupts for resume. | 43 | * @resume_sources: A bitmask of interrupts for resume. |
43 | * @resume_irqs: The IRQs enabled for resume. | 44 | * @resume_irqs: The IRQs enabled for resume. |
44 | * @int_select: Save for VIC_INT_SELECT. | 45 | * @int_select: Save for VIC_INT_SELECT. |
@@ -50,6 +51,7 @@ | |||
50 | struct vic_device { | 51 | struct vic_device { |
51 | void __iomem *base; | 52 | void __iomem *base; |
52 | int irq; | 53 | int irq; |
54 | u32 valid_sources; | ||
53 | u32 resume_sources; | 55 | u32 resume_sources; |
54 | u32 resume_irqs; | 56 | u32 resume_irqs; |
55 | u32 int_select; | 57 | u32 int_select; |
@@ -164,10 +166,32 @@ static int __init vic_pm_init(void) | |||
164 | late_initcall(vic_pm_init); | 166 | late_initcall(vic_pm_init); |
165 | #endif /* CONFIG_PM */ | 167 | #endif /* CONFIG_PM */ |
166 | 168 | ||
169 | static struct irq_chip vic_chip; | ||
170 | |||
171 | static int vic_irqdomain_map(struct irq_domain *d, unsigned int irq, | ||
172 | irq_hw_number_t hwirq) | ||
173 | { | ||
174 | struct vic_device *v = d->host_data; | ||
175 | |||
176 | /* Skip invalid IRQs, only register handlers for the real ones */ | ||
177 | if (!(v->valid_sources & (1 << hwirq))) | ||
178 | return -ENOTSUPP; | ||
179 | irq_set_chip_and_handler(irq, &vic_chip, handle_level_irq); | ||
180 | irq_set_chip_data(irq, v->base); | ||
181 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
182 | return 0; | ||
183 | } | ||
184 | |||
185 | static struct irq_domain_ops vic_irqdomain_ops = { | ||
186 | .map = vic_irqdomain_map, | ||
187 | .xlate = irq_domain_xlate_onetwocell, | ||
188 | }; | ||
189 | |||
167 | /** | 190 | /** |
168 | * vic_register() - Register a VIC. | 191 | * vic_register() - Register a VIC. |
169 | * @base: The base address of the VIC. | 192 | * @base: The base address of the VIC. |
170 | * @irq: The base IRQ for the VIC. | 193 | * @irq: The base IRQ for the VIC. |
194 | * @valid_sources: bitmask of valid interrupts | ||
171 | * @resume_sources: bitmask of interrupts allowed for resume sources. | 195 | * @resume_sources: bitmask of interrupts allowed for resume sources. |
172 | * @node: The device tree node associated with the VIC. | 196 | * @node: The device tree node associated with the VIC. |
173 | * | 197 | * |
@@ -178,7 +202,8 @@ late_initcall(vic_pm_init); | |||
178 | * This also configures the IRQ domain for the VIC. | 202 | * This also configures the IRQ domain for the VIC. |
179 | */ | 203 | */ |
180 | static void __init vic_register(void __iomem *base, unsigned int irq, | 204 | static void __init vic_register(void __iomem *base, unsigned int irq, |
181 | u32 resume_sources, struct device_node *node) | 205 | u32 valid_sources, u32 resume_sources, |
206 | struct device_node *node) | ||
182 | { | 207 | { |
183 | struct vic_device *v; | 208 | struct vic_device *v; |
184 | 209 | ||
@@ -189,11 +214,12 @@ static void __init vic_register(void __iomem *base, unsigned int irq, | |||
189 | 214 | ||
190 | v = &vic_devices[vic_id]; | 215 | v = &vic_devices[vic_id]; |
191 | v->base = base; | 216 | v->base = base; |
217 | v->valid_sources = valid_sources; | ||
192 | v->resume_sources = resume_sources; | 218 | v->resume_sources = resume_sources; |
193 | v->irq = irq; | 219 | v->irq = irq; |
194 | vic_id++; | 220 | vic_id++; |
195 | v->domain = irq_domain_add_legacy(node, 32, irq, 0, | 221 | v->domain = irq_domain_add_legacy(node, fls(valid_sources), irq, 0, |
196 | &irq_domain_simple_ops, v); | 222 | &vic_irqdomain_ops, v); |
197 | } | 223 | } |
198 | 224 | ||
199 | static void vic_ack_irq(struct irq_data *d) | 225 | static void vic_ack_irq(struct irq_data *d) |
@@ -287,23 +313,6 @@ static void __init vic_clear_interrupts(void __iomem *base) | |||
287 | } | 313 | } |
288 | } | 314 | } |
289 | 315 | ||
290 | static void __init vic_set_irq_sources(void __iomem *base, | ||
291 | unsigned int irq_start, u32 vic_sources) | ||
292 | { | ||
293 | unsigned int i; | ||
294 | |||
295 | for (i = 0; i < 32; i++) { | ||
296 | if (vic_sources & (1 << i)) { | ||
297 | unsigned int irq = irq_start + i; | ||
298 | |||
299 | irq_set_chip_and_handler(irq, &vic_chip, | ||
300 | handle_level_irq); | ||
301 | irq_set_chip_data(irq, base); | ||
302 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
303 | } | ||
304 | } | ||
305 | } | ||
306 | |||
307 | /* | 316 | /* |
308 | * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. | 317 | * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. |
309 | * The original cell has 32 interrupts, while the modified one has 64, | 318 | * The original cell has 32 interrupts, while the modified one has 64, |
@@ -338,8 +347,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, | |||
338 | writel(32, base + VIC_PL190_DEF_VECT_ADDR); | 347 | writel(32, base + VIC_PL190_DEF_VECT_ADDR); |
339 | } | 348 | } |
340 | 349 | ||
341 | vic_set_irq_sources(base, irq_start, vic_sources); | 350 | vic_register(base, irq_start, vic_sources, 0, node); |
342 | vic_register(base, irq_start, 0, node); | ||
343 | } | 351 | } |
344 | 352 | ||
345 | void __init __vic_init(void __iomem *base, unsigned int irq_start, | 353 | void __init __vic_init(void __iomem *base, unsigned int irq_start, |
@@ -379,9 +387,7 @@ void __init __vic_init(void __iomem *base, unsigned int irq_start, | |||
379 | 387 | ||
380 | vic_init2(base); | 388 | vic_init2(base); |
381 | 389 | ||
382 | vic_set_irq_sources(base, irq_start, vic_sources); | 390 | vic_register(base, irq_start, vic_sources, resume_sources, node); |
383 | |||
384 | vic_register(base, irq_start, resume_sources, node); | ||
385 | } | 391 | } |
386 | 392 | ||
387 | /** | 393 | /** |