Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (117 commits)
  [ARM] 4058/2: iop32x: set ->broken_parity_status on n2100 onboard r8169 ports
  [ARM] 4140/1: AACI stability add ac97 timeout and retries
  [ARM] 4139/1: AACI record support
  [ARM] 4138/1: AACI: multiple channel support for IRQ handling
  [ARM] 4211/1: Provide a defconfig for ns9xxx
  [ARM] 4210/1: base for new machine type "NetSilicon NS9360"
  [ARM] 4222/1: S3C2443: Remove reference to missing S3C2443_PM
  [ARM] 4221/1: S3C2443: DMA support
  [ARM] 4220/1: S3C24XX: DMA system initialised from sysdev
  [ARM] 4219/1: S3C2443: DMA source definitions
  [ARM] 4218/1: S3C2412: fix CONFIG_CPU_S3C2412_ONLY wrt to S3C2443
  [ARM] 4217/1: S3C24XX: remove the dma channel show at startup
  [ARM] 4090/2: avoid clash between PXA and SA1111 defines
  [ARM] 4216/1: add .gitignore entries for ARM specific files
  [ARM] 4214/2: S3C2410: Add Armzone QT2410
  [ARM] 4215/1: s3c2410 usb device:  per-platform vbus_draw
  [ARM] 4213/1: S3C2410 - Update definition of ADCTSC_XY_PST
  [ARM] 4098/1: ARM: rtc_lock only used with rtc_cmos
  [ARM] 4137/1: Add kexec support
  [ARM] 4201/1: SMP barriers pair needed for the secondary boot process
  ...

Fix up conflict due to typedef removal in sound/arm/aaci.h

2 files changed, 131 insertions, 65 deletions

diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 2e635b814c14..6fbe7722aa44 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -32,7 +32,6 @@
 
 #include <asm/cacheflush.h>
 
-#undef DEBUG
 #undef STATS
 
 #ifdef STATS
@@ -66,14 +65,13 @@ struct dmabounce_pool {
 };
 
 struct dmabounce_device_info {
-        struct list_head node;
-
         struct device *dev;
         struct list_head safe_buffers;
 #ifdef STATS
         unsigned long total_allocs;
         unsigned long map_op_count;
         unsigned long bounce_count;
+        int attr_res;
 #endif
         struct dmabounce_pool   small;
         struct dmabounce_pool   large;
@@ -81,33 +79,23 @@ struct dmabounce_device_info {
         rwlock_t lock;
 };
 
-static LIST_HEAD(dmabounce_devs);
-
 #ifdef STATS
-static void print_alloc_stats(struct dmabounce_device_info *device_info)
+static ssize_t dmabounce_show(struct device *dev, struct device_attribute *attr,
+                              char *buf)
 {
-        printk(KERN_INFO
-                "%s: dmabounce: sbp: %lu, lbp: %lu, other: %lu, total: %lu\n",
-                device_info->dev->bus_id,
-                device_info->small.allocs, device_info->large.allocs,
+        struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
+        return sprintf(buf, "%lu %lu %lu %lu %lu %lu\n",
+                device_info->small.allocs,
+                device_info->large.allocs,
                 device_info->total_allocs - device_info->small.allocs -
                         device_info->large.allocs,
-                device_info->total_allocs);
+                device_info->total_allocs,
+                device_info->map_op_count,
+                device_info->bounce_count);
 }
-#endif
-
-/* find the given device in the dmabounce device list */
-static inline struct dmabounce_device_info *
-find_dmabounce_dev(struct device *dev)
-{
-        struct dmabounce_device_info *d;
 
-        list_for_each_entry(d, &dmabounce_devs, node)
-                if (d->dev == dev)
-                        return d;
-
-        return NULL;
-}
+static DEVICE_ATTR(dmabounce_stats, 0400, dmabounce_show, NULL);
+#endif
 
 
 /* allocate a 'safe' buffer and keep track of it */
@@ -162,8 +150,6 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr,
         if (pool)
                 pool->allocs++;
         device_info->total_allocs++;
-        if (device_info->total_allocs % 1000 == 0)
-                print_alloc_stats(device_info);
 #endif
 
         write_lock_irqsave(&device_info->lock, flags);
@@ -218,20 +204,11 @@ free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer *
 
 /* ************************************************** */
 
-#ifdef STATS
-static void print_map_stats(struct dmabounce_device_info *device_info)
-{
-        dev_info(device_info->dev,
-                "dmabounce: map_op_count=%lu, bounce_count=%lu\n",
-                device_info->map_op_count, device_info->bounce_count);
-}
-#endif
-
 static inline dma_addr_t
 map_single(struct device *dev, void *ptr, size_t size,
                 enum dma_data_direction dir)
 {
-        struct dmabounce_device_info *device_info = find_dmabounce_dev(dev);
+        struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
         dma_addr_t dma_addr;
         int needs_bounce = 0;
 
@@ -281,10 +258,14 @@ map_single(struct device *dev, void *ptr, size_t size,
                 ptr = buf->safe;
 
                 dma_addr = buf->safe_dma_addr;
+        } else {
+                /*
+                 * We don't need to sync the DMA buffer since
+                 * it was allocated via the coherent allocators.
+                 */
+                consistent_sync(ptr, size, dir);
         }
 
-        consistent_sync(ptr, size, dir);
-
         return dma_addr;
 }
 
@@ -292,7 +273,7 @@ static inline void
 unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                 enum dma_data_direction dir)
 {
-        struct dmabounce_device_info *device_info = find_dmabounce_dev(dev);
+        struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
         struct safe_buffer *buf = NULL;
 
         /*
@@ -317,12 +298,12 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                 DO_STATS ( device_info->bounce_count++ );
 
                 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) {
-                        unsigned long ptr;
+                        void *ptr = buf->ptr;
 
                         dev_dbg(dev,
                                 "%s: copy back safe %p to unsafe %p size %d\n",
-                                __func__, buf->safe, buf->ptr, size);
-                        memcpy(buf->ptr, buf->safe, size);
+                                __func__, buf->safe, ptr, size);
+                        memcpy(ptr, buf->safe, size);
 
                         /*
                          * DMA buffers must have the same cache properties
@@ -332,8 +313,8 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                          * bidirectional case because we know the cache
                          * lines will be coherent with the data written.
                          */
-                        ptr = (unsigned long)buf->ptr;
                         dmac_clean_range(ptr, ptr + size);
+                        outer_clean_range(__pa(ptr), __pa(ptr) + size);
                 }
                 free_safe_buffer(device_info, buf);
         }
@@ -343,7 +324,7 @@ static inline void
 sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                 enum dma_data_direction dir)
 {
-        struct dmabounce_device_info *device_info = find_dmabounce_dev(dev);
+        struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
         struct safe_buffer *buf = NULL;
 
         if (device_info)
@@ -397,7 +378,10 @@ sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                 default:
                         BUG();
                 }
-                consistent_sync(buf->safe, size, dir);
+                /*
+                 * No need to sync the safe buffer - it was allocated
+                 * via the coherent allocators.
+                 */
         } else {
                 consistent_sync(dma_to_virt(dev, dma_addr), size, dir);
         }
@@ -604,9 +588,10 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
         device_info->total_allocs = 0;
         device_info->map_op_count = 0;
         device_info->bounce_count = 0;
+        device_info->attr_res = device_create_file(dev, &dev_attr_dmabounce_stats);
 #endif
 
-        list_add(&device_info->node, &dmabounce_devs);
+        dev->archdata.dmabounce = device_info;
 
         printk(KERN_INFO "dmabounce: registered device %s on %s bus\n",
                 dev->bus_id, dev->bus->name);
@@ -623,7 +608,9 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
 void
 dmabounce_unregister_dev(struct device *dev)
 {
-        struct dmabounce_device_info *device_info = find_dmabounce_dev(dev);
+        struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
+
+        dev->archdata.dmabounce = NULL;
 
         if (!device_info) {
                 printk(KERN_WARNING
@@ -645,12 +632,10 @@ dmabounce_unregister_dev(struct device *dev)
                 dma_pool_destroy(device_info->large.pool);
 
 #ifdef STATS
-        print_alloc_stats(device_info);
-        print_map_stats(device_info);
+        if (device_info->attr_res == 0)
+                device_remove_file(dev, &dev_attr_dmabounce_stats);
 #endif
 
-        list_del(&device_info->node);
-
         kfree(device_info);
 
         printk(KERN_INFO "dmabounce: device %s on %s bus unregistered\n",
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 09b9d1b6844c..4deece5fbdf4 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -14,7 +14,9 @@
  *
  * o There is one CPU Interface per CPU, which sends interrupts sent
  *   by the Distributor, and interrupts generated locally, to the
- *   associated CPU.
+ *   associated CPU. The base address of the CPU interface is usually
+ *   aliased so that the same address points to different chips depending
+ *   on the CPU it is accessed from.
  *
  * Note that IRQs 0-31 are special - they are local to each CPU.
  * As such, the enable set/clear, pending set/clear and active bit
@@ -31,10 +33,38 @@
 #include <asm/mach/irq.h>
 #include <asm/hardware/gic.h>
 
-static void __iomem *gic_dist_base;
-static void __iomem *gic_cpu_base;
 static DEFINE_SPINLOCK(irq_controller_lock);
 
+struct gic_chip_data {
+        unsigned int irq_offset;
+        void __iomem *dist_base;
+        void __iomem *cpu_base;
+};
+
+#ifndef MAX_GIC_NR
+#define MAX_GIC_NR      1
+#endif
+
+static struct gic_chip_data gic_data[MAX_GIC_NR];
+
+static inline void __iomem *gic_dist_base(unsigned int irq)
+{
+        struct gic_chip_data *gic_data = get_irq_chip_data(irq);
+        return gic_data->dist_base;
+}
+
+static inline void __iomem *gic_cpu_base(unsigned int irq)
+{
+        struct gic_chip_data *gic_data = get_irq_chip_data(irq);
+        return gic_data->cpu_base;
+}
+
+static inline unsigned int gic_irq(unsigned int irq)
+{
+        struct gic_chip_data *gic_data = get_irq_chip_data(irq);
+        return irq - gic_data->irq_offset;
+}
+
 /*
  * Routines to acknowledge, disable and enable interrupts
  *
@@ -55,8 +85,8 @@ static void gic_ack_irq(unsigned int irq)
         u32 mask = 1 << (irq % 32);
 
         spin_lock(&irq_controller_lock);
-        writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4);
-        writel(irq, gic_cpu_base + GIC_CPU_EOI);
+        writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_CLEAR + (gic_irq(irq) / 32) * 4);
+        writel(gic_irq(irq), gic_cpu_base(irq) + GIC_CPU_EOI);
         spin_unlock(&irq_controller_lock);
 }
 
@@ -65,7 +95,7 @@ static void gic_mask_irq(unsigned int irq)
         u32 mask = 1 << (irq % 32);
 
         spin_lock(&irq_controller_lock);
-        writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4);
+        writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_CLEAR + (gic_irq(irq) / 32) * 4);
         spin_unlock(&irq_controller_lock);
 }
 
@@ -74,14 +104,14 @@ static void gic_unmask_irq(unsigned int irq)
         u32 mask = 1 << (irq % 32);
 
         spin_lock(&irq_controller_lock);
-        writel(mask, gic_dist_base + GIC_DIST_ENABLE_SET + (irq / 32) * 4);
+        writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_SET + (gic_irq(irq) / 32) * 4);
         spin_unlock(&irq_controller_lock);
 }
 
 #ifdef CONFIG_SMP
 static void gic_set_cpu(unsigned int irq, cpumask_t mask_val)
 {
-        void __iomem *reg = gic_dist_base + GIC_DIST_TARGET + (irq & ~3);
+        void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
         unsigned int shift = (irq % 4) * 8;
         unsigned int cpu = first_cpu(mask_val);
         u32 val;
@@ -95,6 +125,37 @@ static void gic_set_cpu(unsigned int irq, cpumask_t mask_val)
 }
 #endif
 
+static void fastcall gic_handle_cascade_irq(unsigned int irq,
+                                            struct irq_desc *desc)
+{
+        struct gic_chip_data *chip_data = get_irq_data(irq);
+        struct irq_chip *chip = get_irq_chip(irq);
+        unsigned int cascade_irq;
+        unsigned long status;
+
+        /* primary controller ack'ing */
+        chip->ack(irq);
+
+        spin_lock(&irq_controller_lock);
+        status = readl(chip_data->cpu_base + GIC_CPU_INTACK);
+        spin_unlock(&irq_controller_lock);
+
+        cascade_irq = (status & 0x3ff);
+        if (cascade_irq > 1020)
+                goto out;
+        if (cascade_irq < 32 || cascade_irq >= NR_IRQS) {
+                do_bad_IRQ(cascade_irq, desc);
+                goto out;
+        }
+
+        cascade_irq += chip_data->irq_offset;
+        generic_handle_irq(cascade_irq);
+
+ out:
+        /* primary controller unmasking */
+        chip->unmask(irq);
+}
+
 static struct irq_chip gic_chip = {
         .name           = "GIC",
         .ack            = gic_ack_irq,
@@ -105,15 +166,29 @@ static struct irq_chip gic_chip = {
 #endif
 };
 
-void __init gic_dist_init(void __iomem *base)
+void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
+{
+        if (gic_nr >= MAX_GIC_NR)
+                BUG();
+        if (set_irq_data(irq, &gic_data[gic_nr]) != 0)
+                BUG();
+        set_irq_chained_handler(irq, gic_handle_cascade_irq);
+}
+
+void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
+                          unsigned int irq_start)
 {
         unsigned int max_irq, i;
         u32 cpumask = 1 << smp_processor_id();
 
+        if (gic_nr >= MAX_GIC_NR)
+                BUG();
+
         cpumask |= cpumask << 8;
         cpumask |= cpumask << 16;
 
-        gic_dist_base = base;
+        gic_data[gic_nr].dist_base = base;
+        gic_data[gic_nr].irq_offset = (irq_start - 1) & ~31;
 
         writel(0, base + GIC_DIST_CTRL);
 
@@ -158,8 +233,9 @@ void __init gic_dist_init(void __iomem *base)
         /*
          * Setup the Linux IRQ subsystem.
          */
-        for (i = 29; i < max_irq; i++) {
+        for (i = irq_start; i < gic_data[gic_nr].irq_offset + max_irq; i++) {
                 set_irq_chip(i, &gic_chip);
+                set_irq_chip_data(i, &gic_data[gic_nr]);
                 set_irq_handler(i, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
         }
@@ -167,9 +243,13 @@ void __init gic_dist_init(void __iomem *base)
         writel(1, base + GIC_DIST_CTRL);
 }
 
-void __cpuinit gic_cpu_init(void __iomem *base)
+void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
 {
-        gic_cpu_base = base;
+        if (gic_nr >= MAX_GIC_NR)
+                BUG();
+
+        gic_data[gic_nr].cpu_base = base;
+
         writel(0xf0, base + GIC_CPU_PRIMASK);
         writel(1, base + GIC_CPU_CTRL);
 }
@@ -179,6 +259,7 @@ void gic_raise_softirq(cpumask_t cpumask, unsigned int irq)
 {
         unsigned long map = *cpus_addr(cpumask);
 
-        writel(map << 16 | irq, gic_dist_base + GIC_DIST_SOFTINT);
+        /* this always happens on GIC0 */
+        writel(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT);
 }
 #endif