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authorLinus Torvalds <torvalds@linux-foundation.org>2011-01-15 15:33:40 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-01-15 15:33:40 -0500
commit16c1020362083b320868c0deef492249089c3cd3 (patch)
treeff200df3502e6010745713275d69fd0a07e399cf /arch/arm/common
parent65e5d002b5ad220db2bf9557f53de5a98f7dab86 (diff)
parentbbba75606963c82febf7bd2761ea848ac5d1a1bb (diff)
Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits) ARM: pxa: fix building issue of missing physmap.h ARM: mmp: PXA910 drive strength FAST using wrong value ARM: mmp: MMP2 drive strength FAST using wrong value ARM: pxa: fix recursive calls in pxa_low_gpio_chip AT91: Support for gsia18s board AT91: Acme Systems FOX Board G20 board files AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h ARM: pxa: fix suspend/resume array index miscalculation ARM: pxa: use cpu_has_ipr() consistently in irq.c ARM: pxa: remove unused variable in clock-pxa3xx.c ARM: pxa: fix warning in zeus.c ARM: sa1111: fix typo in sa1111_retrigger_lowirq() ARM mxs: clkdev related compile fixes ARM i.MX mx31_3ds: Fix MC13783 regulator names ARM: plat-stmp3xxx: irq_data conversion. ARM: plat-spear: irq_data conversion. ARM: plat-orion: irq_data conversion. ARM: plat-omap: irq_data conversion. ARM: plat-nomadik: irq_data conversion. ARM: plat-mxc: irq_data conversion. ... Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert Buytenhek's irq_data conversion clashing with some omap irq updates)
Diffstat (limited to 'arch/arm/common')
-rw-r--r--arch/arm/common/gic.c66
-rw-r--r--arch/arm/common/it8152.c14
-rw-r--r--arch/arm/common/locomo.c24
-rw-r--r--arch/arm/common/sa1111.c96
-rw-r--r--arch/arm/common/vic.c32
5 files changed, 118 insertions, 114 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 0b89ef001330..224377211151 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -50,57 +50,56 @@ struct gic_chip_data {
50 50
51static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly; 51static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
52 52
53static inline void __iomem *gic_dist_base(unsigned int irq) 53static inline void __iomem *gic_dist_base(struct irq_data *d)
54{ 54{
55 struct gic_chip_data *gic_data = get_irq_chip_data(irq); 55 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
56 return gic_data->dist_base; 56 return gic_data->dist_base;
57} 57}
58 58
59static inline void __iomem *gic_cpu_base(unsigned int irq) 59static inline void __iomem *gic_cpu_base(struct irq_data *d)
60{ 60{
61 struct gic_chip_data *gic_data = get_irq_chip_data(irq); 61 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
62 return gic_data->cpu_base; 62 return gic_data->cpu_base;
63} 63}
64 64
65static inline unsigned int gic_irq(unsigned int irq) 65static inline unsigned int gic_irq(struct irq_data *d)
66{ 66{
67 struct gic_chip_data *gic_data = get_irq_chip_data(irq); 67 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
68 return irq - gic_data->irq_offset; 68 return d->irq - gic_data->irq_offset;
69} 69}
70 70
71/* 71/*
72 * Routines to acknowledge, disable and enable interrupts 72 * Routines to acknowledge, disable and enable interrupts
73 */ 73 */
74static void gic_ack_irq(unsigned int irq) 74static void gic_ack_irq(struct irq_data *d)
75{ 75{
76
77 spin_lock(&irq_controller_lock); 76 spin_lock(&irq_controller_lock);
78 writel(gic_irq(irq), gic_cpu_base(irq) + GIC_CPU_EOI); 77 writel(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
79 spin_unlock(&irq_controller_lock); 78 spin_unlock(&irq_controller_lock);
80} 79}
81 80
82static void gic_mask_irq(unsigned int irq) 81static void gic_mask_irq(struct irq_data *d)
83{ 82{
84 u32 mask = 1 << (irq % 32); 83 u32 mask = 1 << (d->irq % 32);
85 84
86 spin_lock(&irq_controller_lock); 85 spin_lock(&irq_controller_lock);
87 writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_CLEAR + (gic_irq(irq) / 32) * 4); 86 writel(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4);
88 spin_unlock(&irq_controller_lock); 87 spin_unlock(&irq_controller_lock);
89} 88}
90 89
91static void gic_unmask_irq(unsigned int irq) 90static void gic_unmask_irq(struct irq_data *d)
92{ 91{
93 u32 mask = 1 << (irq % 32); 92 u32 mask = 1 << (d->irq % 32);
94 93
95 spin_lock(&irq_controller_lock); 94 spin_lock(&irq_controller_lock);
96 writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_SET + (gic_irq(irq) / 32) * 4); 95 writel(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4);
97 spin_unlock(&irq_controller_lock); 96 spin_unlock(&irq_controller_lock);
98} 97}
99 98
100static int gic_set_type(unsigned int irq, unsigned int type) 99static int gic_set_type(struct irq_data *d, unsigned int type)
101{ 100{
102 void __iomem *base = gic_dist_base(irq); 101 void __iomem *base = gic_dist_base(d);
103 unsigned int gicirq = gic_irq(irq); 102 unsigned int gicirq = gic_irq(d);
104 u32 enablemask = 1 << (gicirq % 32); 103 u32 enablemask = 1 << (gicirq % 32);
105 u32 enableoff = (gicirq / 32) * 4; 104 u32 enableoff = (gicirq / 32) * 4;
106 u32 confmask = 0x2 << ((gicirq % 16) * 2); 105 u32 confmask = 0x2 << ((gicirq % 16) * 2);
@@ -143,21 +142,22 @@ static int gic_set_type(unsigned int irq, unsigned int type)
143} 142}
144 143
145#ifdef CONFIG_SMP 144#ifdef CONFIG_SMP
146static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) 145static int
146gic_set_cpu(struct irq_data *d, const struct cpumask *mask_val, bool force)
147{ 147{
148 void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3); 148 void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);
149 unsigned int shift = (irq % 4) * 8; 149 unsigned int shift = (d->irq % 4) * 8;
150 unsigned int cpu = cpumask_first(mask_val); 150 unsigned int cpu = cpumask_first(mask_val);
151 u32 val; 151 u32 val;
152 struct irq_desc *desc; 152 struct irq_desc *desc;
153 153
154 spin_lock(&irq_controller_lock); 154 spin_lock(&irq_controller_lock);
155 desc = irq_to_desc(irq); 155 desc = irq_to_desc(d->irq);
156 if (desc == NULL) { 156 if (desc == NULL) {
157 spin_unlock(&irq_controller_lock); 157 spin_unlock(&irq_controller_lock);
158 return -EINVAL; 158 return -EINVAL;
159 } 159 }
160 desc->node = cpu; 160 d->node = cpu;
161 val = readl(reg) & ~(0xff << shift); 161 val = readl(reg) & ~(0xff << shift);
162 val |= 1 << (cpu + shift); 162 val |= 1 << (cpu + shift);
163 writel(val, reg); 163 writel(val, reg);
@@ -175,7 +175,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
175 unsigned long status; 175 unsigned long status;
176 176
177 /* primary controller ack'ing */ 177 /* primary controller ack'ing */
178 chip->ack(irq); 178 chip->irq_ack(&desc->irq_data);
179 179
180 spin_lock(&irq_controller_lock); 180 spin_lock(&irq_controller_lock);
181 status = readl(chip_data->cpu_base + GIC_CPU_INTACK); 181 status = readl(chip_data->cpu_base + GIC_CPU_INTACK);
@@ -193,17 +193,17 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
193 193
194 out: 194 out:
195 /* primary controller unmasking */ 195 /* primary controller unmasking */
196 chip->unmask(irq); 196 chip->irq_unmask(&desc->irq_data);
197} 197}
198 198
199static struct irq_chip gic_chip = { 199static struct irq_chip gic_chip = {
200 .name = "GIC", 200 .name = "GIC",
201 .ack = gic_ack_irq, 201 .irq_ack = gic_ack_irq,
202 .mask = gic_mask_irq, 202 .irq_mask = gic_mask_irq,
203 .unmask = gic_unmask_irq, 203 .irq_unmask = gic_unmask_irq,
204 .set_type = gic_set_type, 204 .irq_set_type = gic_set_type,
205#ifdef CONFIG_SMP 205#ifdef CONFIG_SMP
206 .set_affinity = gic_set_cpu, 206 .irq_set_affinity = gic_set_cpu,
207#endif 207#endif
208}; 208};
209 209
@@ -337,7 +337,7 @@ void __cpuinit gic_enable_ppi(unsigned int irq)
337 337
338 local_irq_save(flags); 338 local_irq_save(flags);
339 irq_to_desc(irq)->status |= IRQ_NOPROBE; 339 irq_to_desc(irq)->status |= IRQ_NOPROBE;
340 gic_unmask_irq(irq); 340 gic_unmask_irq(irq_get_irq_data(irq));
341 local_irq_restore(flags); 341 local_irq_restore(flags);
342} 342}
343 343
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 665ebf7e62a6..fcddd48fe9da 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -31,8 +31,10 @@
31 31
32#define MAX_SLOTS 21 32#define MAX_SLOTS 21
33 33
34static void it8152_mask_irq(unsigned int irq) 34static void it8152_mask_irq(struct irq_data *d)
35{ 35{
36 unsigned int irq = d->irq;
37
36 if (irq >= IT8152_LD_IRQ(0)) { 38 if (irq >= IT8152_LD_IRQ(0)) {
37 __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) | 39 __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) |
38 (1 << (irq - IT8152_LD_IRQ(0)))), 40 (1 << (irq - IT8152_LD_IRQ(0)))),
@@ -48,8 +50,10 @@ static void it8152_mask_irq(unsigned int irq)
48 } 50 }
49} 51}
50 52
51static void it8152_unmask_irq(unsigned int irq) 53static void it8152_unmask_irq(struct irq_data *d)
52{ 54{
55 unsigned int irq = d->irq;
56
53 if (irq >= IT8152_LD_IRQ(0)) { 57 if (irq >= IT8152_LD_IRQ(0)) {
54 __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) & 58 __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) &
55 ~(1 << (irq - IT8152_LD_IRQ(0)))), 59 ~(1 << (irq - IT8152_LD_IRQ(0)))),
@@ -67,9 +71,9 @@ static void it8152_unmask_irq(unsigned int irq)
67 71
68static struct irq_chip it8152_irq_chip = { 72static struct irq_chip it8152_irq_chip = {
69 .name = "it8152", 73 .name = "it8152",
70 .ack = it8152_mask_irq, 74 .irq_ack = it8152_mask_irq,
71 .mask = it8152_mask_irq, 75 .irq_mask = it8152_mask_irq,
72 .unmask = it8152_unmask_irq, 76 .irq_unmask = it8152_unmask_irq,
73}; 77};
74 78
75void it8152_init_irq(void) 79void it8152_init_irq(void)
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 9dff07c80ddb..a026a6bf4892 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -144,7 +144,7 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc)
144 int req, i; 144 int req, i;
145 145
146 /* Acknowledge the parent IRQ */ 146 /* Acknowledge the parent IRQ */
147 desc->chip->ack(irq); 147 desc->irq_data.chip->irq_ack(&desc->irq_data);
148 148
149 /* check why this interrupt was generated */ 149 /* check why this interrupt was generated */
150 req = locomo_readl(lchip->base + LOCOMO_ICR) & 0x0f00; 150 req = locomo_readl(lchip->base + LOCOMO_ICR) & 0x0f00;
@@ -161,33 +161,33 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc)
161 } 161 }
162} 162}
163 163
164static void locomo_ack_irq(unsigned int irq) 164static void locomo_ack_irq(struct irq_data *d)
165{ 165{
166} 166}
167 167
168static void locomo_mask_irq(unsigned int irq) 168static void locomo_mask_irq(struct irq_data *d)
169{ 169{
170 struct locomo *lchip = get_irq_chip_data(irq); 170 struct locomo *lchip = irq_data_get_irq_chip_data(d);
171 unsigned int r; 171 unsigned int r;
172 r = locomo_readl(lchip->base + LOCOMO_ICR); 172 r = locomo_readl(lchip->base + LOCOMO_ICR);
173 r &= ~(0x0010 << (irq - lchip->irq_base)); 173 r &= ~(0x0010 << (d->irq - lchip->irq_base));
174 locomo_writel(r, lchip->base + LOCOMO_ICR); 174 locomo_writel(r, lchip->base + LOCOMO_ICR);
175} 175}
176 176
177static void locomo_unmask_irq(unsigned int irq) 177static void locomo_unmask_irq(struct irq_data *d)
178{ 178{
179 struct locomo *lchip = get_irq_chip_data(irq); 179 struct locomo *lchip = irq_data_get_irq_chip_data(d);
180 unsigned int r; 180 unsigned int r;
181 r = locomo_readl(lchip->base + LOCOMO_ICR); 181 r = locomo_readl(lchip->base + LOCOMO_ICR);
182 r |= (0x0010 << (irq - lchip->irq_base)); 182 r |= (0x0010 << (d->irq - lchip->irq_base));
183 locomo_writel(r, lchip->base + LOCOMO_ICR); 183 locomo_writel(r, lchip->base + LOCOMO_ICR);
184} 184}
185 185
186static struct irq_chip locomo_chip = { 186static struct irq_chip locomo_chip = {
187 .name = "LOCOMO", 187 .name = "LOCOMO",
188 .ack = locomo_ack_irq, 188 .irq_ack = locomo_ack_irq,
189 .mask = locomo_mask_irq, 189 .irq_mask = locomo_mask_irq,
190 .unmask = locomo_unmask_irq, 190 .irq_unmask = locomo_unmask_irq,
191}; 191};
192 192
193static void locomo_setup_irq(struct locomo *lchip) 193static void locomo_setup_irq(struct locomo *lchip)
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index c0258a8c103b..eb9796b0dab2 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -210,7 +210,7 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
210 210
211 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0); 211 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
212 212
213 desc->chip->ack(irq); 213 desc->irq_data.chip->irq_ack(&desc->irq_data);
214 214
215 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); 215 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
216 216
@@ -228,35 +228,35 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
228 generic_handle_irq(i + sachip->irq_base); 228 generic_handle_irq(i + sachip->irq_base);
229 229
230 /* For level-based interrupts */ 230 /* For level-based interrupts */
231 desc->chip->unmask(irq); 231 desc->irq_data.chip->irq_unmask(&desc->irq_data);
232} 232}
233 233
234#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base)) 234#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
235#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32)) 235#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
236 236
237static void sa1111_ack_irq(unsigned int irq) 237static void sa1111_ack_irq(struct irq_data *d)
238{ 238{
239} 239}
240 240
241static void sa1111_mask_lowirq(unsigned int irq) 241static void sa1111_mask_lowirq(struct irq_data *d)
242{ 242{
243 struct sa1111 *sachip = get_irq_chip_data(irq); 243 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
244 void __iomem *mapbase = sachip->base + SA1111_INTC; 244 void __iomem *mapbase = sachip->base + SA1111_INTC;
245 unsigned long ie0; 245 unsigned long ie0;
246 246
247 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 247 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
248 ie0 &= ~SA1111_IRQMASK_LO(irq); 248 ie0 &= ~SA1111_IRQMASK_LO(d->irq);
249 writel(ie0, mapbase + SA1111_INTEN0); 249 writel(ie0, mapbase + SA1111_INTEN0);
250} 250}
251 251
252static void sa1111_unmask_lowirq(unsigned int irq) 252static void sa1111_unmask_lowirq(struct irq_data *d)
253{ 253{
254 struct sa1111 *sachip = get_irq_chip_data(irq); 254 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
255 void __iomem *mapbase = sachip->base + SA1111_INTC; 255 void __iomem *mapbase = sachip->base + SA1111_INTC;
256 unsigned long ie0; 256 unsigned long ie0;
257 257
258 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 258 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
259 ie0 |= SA1111_IRQMASK_LO(irq); 259 ie0 |= SA1111_IRQMASK_LO(d->irq);
260 sa1111_writel(ie0, mapbase + SA1111_INTEN0); 260 sa1111_writel(ie0, mapbase + SA1111_INTEN0);
261} 261}
262 262
@@ -267,11 +267,11 @@ static void sa1111_unmask_lowirq(unsigned int irq)
267 * be triggered. In fact, its very difficult, if not impossible to get 267 * be triggered. In fact, its very difficult, if not impossible to get
268 * INTSET to re-trigger the interrupt. 268 * INTSET to re-trigger the interrupt.
269 */ 269 */
270static int sa1111_retrigger_lowirq(unsigned int irq) 270static int sa1111_retrigger_lowirq(struct irq_data *d)
271{ 271{
272 struct sa1111 *sachip = get_irq_chip_data(irq); 272 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
273 void __iomem *mapbase = sachip->base + SA1111_INTC; 273 void __iomem *mapbase = sachip->base + SA1111_INTC;
274 unsigned int mask = SA1111_IRQMASK_LO(irq); 274 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
275 unsigned long ip0; 275 unsigned long ip0;
276 int i; 276 int i;
277 277
@@ -279,21 +279,21 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
279 for (i = 0; i < 8; i++) { 279 for (i = 0; i < 8; i++) {
280 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); 280 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
281 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 281 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
282 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) 282 if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask)
283 break; 283 break;
284 } 284 }
285 285
286 if (i == 8) 286 if (i == 8)
287 printk(KERN_ERR "Danger Will Robinson: failed to " 287 printk(KERN_ERR "Danger Will Robinson: failed to "
288 "re-trigger IRQ%d\n", irq); 288 "re-trigger IRQ%d\n", d->irq);
289 return i == 8 ? -1 : 0; 289 return i == 8 ? -1 : 0;
290} 290}
291 291
292static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) 292static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags)
293{ 293{
294 struct sa1111 *sachip = get_irq_chip_data(irq); 294 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
295 void __iomem *mapbase = sachip->base + SA1111_INTC; 295 void __iomem *mapbase = sachip->base + SA1111_INTC;
296 unsigned int mask = SA1111_IRQMASK_LO(irq); 296 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
297 unsigned long ip0; 297 unsigned long ip0;
298 298
299 if (flags == IRQ_TYPE_PROBE) 299 if (flags == IRQ_TYPE_PROBE)
@@ -313,11 +313,11 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
313 return 0; 313 return 0;
314} 314}
315 315
316static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) 316static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on)
317{ 317{
318 struct sa1111 *sachip = get_irq_chip_data(irq); 318 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
319 void __iomem *mapbase = sachip->base + SA1111_INTC; 319 void __iomem *mapbase = sachip->base + SA1111_INTC;
320 unsigned int mask = SA1111_IRQMASK_LO(irq); 320 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
321 unsigned long we0; 321 unsigned long we0;
322 322
323 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); 323 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
@@ -332,33 +332,33 @@ static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
332 332
333static struct irq_chip sa1111_low_chip = { 333static struct irq_chip sa1111_low_chip = {
334 .name = "SA1111-l", 334 .name = "SA1111-l",
335 .ack = sa1111_ack_irq, 335 .irq_ack = sa1111_ack_irq,
336 .mask = sa1111_mask_lowirq, 336 .irq_mask = sa1111_mask_lowirq,
337 .unmask = sa1111_unmask_lowirq, 337 .irq_unmask = sa1111_unmask_lowirq,
338 .retrigger = sa1111_retrigger_lowirq, 338 .irq_retrigger = sa1111_retrigger_lowirq,
339 .set_type = sa1111_type_lowirq, 339 .irq_set_type = sa1111_type_lowirq,
340 .set_wake = sa1111_wake_lowirq, 340 .irq_set_wake = sa1111_wake_lowirq,
341}; 341};
342 342
343static void sa1111_mask_highirq(unsigned int irq) 343static void sa1111_mask_highirq(struct irq_data *d)
344{ 344{
345 struct sa1111 *sachip = get_irq_chip_data(irq); 345 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
346 void __iomem *mapbase = sachip->base + SA1111_INTC; 346 void __iomem *mapbase = sachip->base + SA1111_INTC;
347 unsigned long ie1; 347 unsigned long ie1;
348 348
349 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 349 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
350 ie1 &= ~SA1111_IRQMASK_HI(irq); 350 ie1 &= ~SA1111_IRQMASK_HI(d->irq);
351 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 351 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
352} 352}
353 353
354static void sa1111_unmask_highirq(unsigned int irq) 354static void sa1111_unmask_highirq(struct irq_data *d)
355{ 355{
356 struct sa1111 *sachip = get_irq_chip_data(irq); 356 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
357 void __iomem *mapbase = sachip->base + SA1111_INTC; 357 void __iomem *mapbase = sachip->base + SA1111_INTC;
358 unsigned long ie1; 358 unsigned long ie1;
359 359
360 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 360 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
361 ie1 |= SA1111_IRQMASK_HI(irq); 361 ie1 |= SA1111_IRQMASK_HI(d->irq);
362 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 362 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
363} 363}
364 364
@@ -369,11 +369,11 @@ static void sa1111_unmask_highirq(unsigned int irq)
369 * be triggered. In fact, its very difficult, if not impossible to get 369 * be triggered. In fact, its very difficult, if not impossible to get
370 * INTSET to re-trigger the interrupt. 370 * INTSET to re-trigger the interrupt.
371 */ 371 */
372static int sa1111_retrigger_highirq(unsigned int irq) 372static int sa1111_retrigger_highirq(struct irq_data *d)
373{ 373{
374 struct sa1111 *sachip = get_irq_chip_data(irq); 374 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
375 void __iomem *mapbase = sachip->base + SA1111_INTC; 375 void __iomem *mapbase = sachip->base + SA1111_INTC;
376 unsigned int mask = SA1111_IRQMASK_HI(irq); 376 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
377 unsigned long ip1; 377 unsigned long ip1;
378 int i; 378 int i;
379 379
@@ -387,15 +387,15 @@ static int sa1111_retrigger_highirq(unsigned int irq)
387 387
388 if (i == 8) 388 if (i == 8)
389 printk(KERN_ERR "Danger Will Robinson: failed to " 389 printk(KERN_ERR "Danger Will Robinson: failed to "
390 "re-trigger IRQ%d\n", irq); 390 "re-trigger IRQ%d\n", d->irq);
391 return i == 8 ? -1 : 0; 391 return i == 8 ? -1 : 0;
392} 392}
393 393
394static int sa1111_type_highirq(unsigned int irq, unsigned int flags) 394static int sa1111_type_highirq(struct irq_data *d, unsigned int flags)
395{ 395{
396 struct sa1111 *sachip = get_irq_chip_data(irq); 396 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
397 void __iomem *mapbase = sachip->base + SA1111_INTC; 397 void __iomem *mapbase = sachip->base + SA1111_INTC;
398 unsigned int mask = SA1111_IRQMASK_HI(irq); 398 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
399 unsigned long ip1; 399 unsigned long ip1;
400 400
401 if (flags == IRQ_TYPE_PROBE) 401 if (flags == IRQ_TYPE_PROBE)
@@ -415,11 +415,11 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
415 return 0; 415 return 0;
416} 416}
417 417
418static int sa1111_wake_highirq(unsigned int irq, unsigned int on) 418static int sa1111_wake_highirq(struct irq_data *d, unsigned int on)
419{ 419{
420 struct sa1111 *sachip = get_irq_chip_data(irq); 420 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
421 void __iomem *mapbase = sachip->base + SA1111_INTC; 421 void __iomem *mapbase = sachip->base + SA1111_INTC;
422 unsigned int mask = SA1111_IRQMASK_HI(irq); 422 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
423 unsigned long we1; 423 unsigned long we1;
424 424
425 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); 425 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
@@ -434,12 +434,12 @@ static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
434 434
435static struct irq_chip sa1111_high_chip = { 435static struct irq_chip sa1111_high_chip = {
436 .name = "SA1111-h", 436 .name = "SA1111-h",
437 .ack = sa1111_ack_irq, 437 .irq_ack = sa1111_ack_irq,
438 .mask = sa1111_mask_highirq, 438 .irq_mask = sa1111_mask_highirq,
439 .unmask = sa1111_unmask_highirq, 439 .irq_unmask = sa1111_unmask_highirq,
440 .retrigger = sa1111_retrigger_highirq, 440 .irq_retrigger = sa1111_retrigger_highirq,
441 .set_type = sa1111_type_highirq, 441 .irq_set_type = sa1111_type_highirq,
442 .set_wake = sa1111_wake_highirq, 442 .irq_set_wake = sa1111_wake_highirq,
443}; 443};
444 444
445static void sa1111_setup_irq(struct sa1111 *sachip) 445static void sa1111_setup_irq(struct sa1111 *sachip)
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index cb660bc54d7a..ae5fe7292e0d 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -204,26 +204,26 @@ static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 res
204static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } 204static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
205#endif /* CONFIG_PM */ 205#endif /* CONFIG_PM */
206 206
207static void vic_ack_irq(unsigned int irq) 207static void vic_ack_irq(struct irq_data *d)
208{ 208{
209 void __iomem *base = get_irq_chip_data(irq); 209 void __iomem *base = irq_data_get_irq_chip_data(d);
210 irq &= 31; 210 unsigned int irq = d->irq & 31;
211 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); 211 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
212 /* moreover, clear the soft-triggered, in case it was the reason */ 212 /* moreover, clear the soft-triggered, in case it was the reason */
213 writel(1 << irq, base + VIC_INT_SOFT_CLEAR); 213 writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
214} 214}
215 215
216static void vic_mask_irq(unsigned int irq) 216static void vic_mask_irq(struct irq_data *d)
217{ 217{
218 void __iomem *base = get_irq_chip_data(irq); 218 void __iomem *base = irq_data_get_irq_chip_data(d);
219 irq &= 31; 219 unsigned int irq = d->irq & 31;
220 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); 220 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
221} 221}
222 222
223static void vic_unmask_irq(unsigned int irq) 223static void vic_unmask_irq(struct irq_data *d)
224{ 224{
225 void __iomem *base = get_irq_chip_data(irq); 225 void __iomem *base = irq_data_get_irq_chip_data(d);
226 irq &= 31; 226 unsigned int irq = d->irq & 31;
227 writel(1 << irq, base + VIC_INT_ENABLE); 227 writel(1 << irq, base + VIC_INT_ENABLE);
228} 228}
229 229
@@ -242,10 +242,10 @@ static struct vic_device *vic_from_irq(unsigned int irq)
242 return NULL; 242 return NULL;
243} 243}
244 244
245static int vic_set_wake(unsigned int irq, unsigned int on) 245static int vic_set_wake(struct irq_data *d, unsigned int on)
246{ 246{
247 struct vic_device *v = vic_from_irq(irq); 247 struct vic_device *v = vic_from_irq(d->irq);
248 unsigned int off = irq & 31; 248 unsigned int off = d->irq & 31;
249 u32 bit = 1 << off; 249 u32 bit = 1 << off;
250 250
251 if (!v) 251 if (!v)
@@ -267,10 +267,10 @@ static int vic_set_wake(unsigned int irq, unsigned int on)
267 267
268static struct irq_chip vic_chip = { 268static struct irq_chip vic_chip = {
269 .name = "VIC", 269 .name = "VIC",
270 .ack = vic_ack_irq, 270 .irq_ack = vic_ack_irq,
271 .mask = vic_mask_irq, 271 .irq_mask = vic_mask_irq,
272 .unmask = vic_unmask_irq, 272 .irq_unmask = vic_unmask_irq,
273 .set_wake = vic_set_wake, 273 .irq_set_wake = vic_set_wake,
274}; 274};
275 275
276static void __init vic_disable(void __iomem *base) 276static void __init vic_disable(void __iomem *base)