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authorSimon Arlott <simon@fire.lp0.eu>2007-05-11 15:40:30 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-20 15:10:32 -0400
commit6cbdc8c5357276307a77deeada3f04626ff17da6 (patch)
treee0a4190d816fa4efb6ddb331b859bf0d5eb9c1a3 /arch/arm/common
parentfc432e1952a3899ce35e84b417e5d60f74cb901b (diff)
[ARM] spelling fixes
Spelling fixes in arch/arm/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/common')
-rw-r--r--arch/arm/common/dmabounce.c2
-rw-r--r--arch/arm/common/gic.c2
-rw-r--r--arch/arm/common/sharpsl_param.c2
-rw-r--r--arch/arm/common/sharpsl_pm.c10
4 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 6fbe7722aa44..b36b1e8a105d 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -6,7 +6,7 @@
6 * copy data to/from buffers located outside the DMA region. This 6 * copy data to/from buffers located outside the DMA region. This
7 * only works for systems in which DMA memory is at the bottom of 7 * only works for systems in which DMA memory is at the bottom of
8 * RAM, the remainder of memory is at the top and the DMA memory 8 * RAM, the remainder of memory is at the top and the DMA memory
9 * can be marked as ZONE_DMA. Anything beyond that such as discontigous 9 * can be marked as ZONE_DMA. Anything beyond that such as discontiguous
10 * DMA windows will require custom implementations that reserve memory 10 * DMA windows will require custom implementations that reserve memory
11 * areas at early bootup. 11 * areas at early bootup.
12 * 12 *
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 2ae0bd1c907d..0c89bd35e06f 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -72,7 +72,7 @@ static inline unsigned int gic_irq(unsigned int irq)
72 * unmask it, in the same way we need to unmask an interrupt when 72 * unmask it, in the same way we need to unmask an interrupt when
73 * we first enable it. 73 * we first enable it.
74 * 74 *
75 * The GIC has a seperate notion of "end of interrupt" to re-enable 75 * The GIC has a separate notion of "end of interrupt" to re-enable
76 * an interrupt after handling, in order to support hardware 76 * an interrupt after handling, in order to support hardware
77 * prioritisation. 77 * prioritisation.
78 * 78 *
diff --git a/arch/arm/common/sharpsl_param.c b/arch/arm/common/sharpsl_param.c
index c94864c5b1af..aad4d94ba8f5 100644
--- a/arch/arm/common/sharpsl_param.c
+++ b/arch/arm/common/sharpsl_param.c
@@ -20,7 +20,7 @@
20 * typically including LCD parameters are loaded by the bootloader at the 20 * typically including LCD parameters are loaded by the bootloader at the
21 * address PARAM_BASE. As the kernel will overwrite them, we need to store 21 * address PARAM_BASE. As the kernel will overwrite them, we need to store
22 * them early in the boot process, then pass them to the appropriate drivers. 22 * them early in the boot process, then pass them to the appropriate drivers.
23 * Not all devices use all paramaters but the format is common to all. 23 * Not all devices use all parameters but the format is common to all.
24 */ 24 */
25#ifdef CONFIG_ARCH_SA1100 25#ifdef CONFIG_ARCH_SA1100
26#define PARAM_BASE 0xe8ffc000 26#define PARAM_BASE 0xe8ffc000
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c
index c8e78d96e592..3bf3a927ae22 100644
--- a/arch/arm/common/sharpsl_pm.c
+++ b/arch/arm/common/sharpsl_pm.c
@@ -291,7 +291,7 @@ static void sharpsl_chrg_full_timer(unsigned long data)
291} 291}
292 292
293/* Charging Finished Interrupt (Not present on Corgi) */ 293/* Charging Finished Interrupt (Not present on Corgi) */
294/* Can trigger at the same time as an AC staus change so 294/* Can trigger at the same time as an AC status change so
295 delay until after that has been processed */ 295 delay until after that has been processed */
296irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id) 296irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id)
297{ 297{
@@ -635,7 +635,7 @@ static int sharpsl_fatal_check(void)
635 635
636static int sharpsl_off_charge_error(void) 636static int sharpsl_off_charge_error(void)
637{ 637{
638 dev_err(sharpsl_pm.dev, "Offline Charger: Error occured.\n"); 638 dev_err(sharpsl_pm.dev, "Offline Charger: Error occurred.\n");
639 sharpsl_pm.machinfo->charge(0); 639 sharpsl_pm.machinfo->charge(0);
640 sharpsl_pm_led(SHARPSL_LED_ERROR); 640 sharpsl_pm_led(SHARPSL_LED_ERROR);
641 sharpsl_pm.charge_mode = CHRG_ERROR; 641 sharpsl_pm.charge_mode = CHRG_ERROR;
@@ -691,14 +691,14 @@ static int sharpsl_off_charge_battery(void)
691 691
692 time = RCNR; 692 time = RCNR;
693 while(1) { 693 while(1) {
694 /* Check if any wakeup event had occured */ 694 /* Check if any wakeup event had occurred */
695 if (sharpsl_pm.machinfo->charger_wakeup() != 0) 695 if (sharpsl_pm.machinfo->charger_wakeup() != 0)
696 return 0; 696 return 0;
697 /* Check for timeout */ 697 /* Check for timeout */
698 if ((RCNR - time) > SHARPSL_WAIT_CO_TIME) 698 if ((RCNR - time) > SHARPSL_WAIT_CO_TIME)
699 return 1; 699 return 1;
700 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_CHRGFULL)) { 700 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_CHRGFULL)) {
701 dev_dbg(sharpsl_pm.dev, "Offline Charger: Charge full occured. Retrying to check\n"); 701 dev_dbg(sharpsl_pm.dev, "Offline Charger: Charge full occurred. Retrying to check\n");
702 sharpsl_pm.full_count++; 702 sharpsl_pm.full_count++;
703 sharpsl_pm.machinfo->charge(0); 703 sharpsl_pm.machinfo->charge(0);
704 mdelay(SHARPSL_CHARGE_WAIT_TIME); 704 mdelay(SHARPSL_CHARGE_WAIT_TIME);
@@ -714,7 +714,7 @@ static int sharpsl_off_charge_battery(void)
714 714
715 time = RCNR; 715 time = RCNR;
716 while(1) { 716 while(1) {
717 /* Check if any wakeup event had occured */ 717 /* Check if any wakeup event had occurred */
718 if (sharpsl_pm.machinfo->charger_wakeup() != 0) 718 if (sharpsl_pm.machinfo->charger_wakeup() != 0)
719 return 0; 719 return 0;
720 /* Check for timeout */ 720 /* Check for timeout */