diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-06-22 05:30:56 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-06-22 05:30:56 -0400 |
commit | 8b76a68c6caafef5a91cdc80958aecaca76a8896 (patch) | |
tree | f22a684595267ee6b087381a00a543f46482c8a1 /arch/arm/common | |
parent | 744da2cb598639767ddcc90ca855771bc524fe76 (diff) |
[ARM] 3620/2: ixp23xx: add uengine loader support
Patch from Lennert Buytenhek
This patch allows the ixp2000 uengine loader that is already in the
tree to also be used on the ixp23xx.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/common')
-rw-r--r-- | arch/arm/common/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/common/uengine.c | 58 |
2 files changed, 49 insertions, 10 deletions
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 847e3e6356c6..e1289a256ce5 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile | |||
@@ -16,3 +16,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o | |||
16 | obj-$(CONFIG_SHARPSL_PM) += sharpsl_pm.o | 16 | obj-$(CONFIG_SHARPSL_PM) += sharpsl_pm.o |
17 | obj-$(CONFIG_SHARP_SCOOP) += scoop.o | 17 | obj-$(CONFIG_SHARP_SCOOP) += scoop.o |
18 | obj-$(CONFIG_ARCH_IXP2000) += uengine.o | 18 | obj-$(CONFIG_ARCH_IXP2000) += uengine.o |
19 | obj-$(CONFIG_ARCH_IXP23XX) += uengine.o | ||
diff --git a/arch/arm/common/uengine.c b/arch/arm/common/uengine.c index a1310b71004e..dfca596a9a27 100644 --- a/arch/arm/common/uengine.c +++ b/arch/arm/common/uengine.c | |||
@@ -18,10 +18,26 @@ | |||
18 | #include <linux/module.h> | 18 | #include <linux/module.h> |
19 | #include <linux/string.h> | 19 | #include <linux/string.h> |
20 | #include <asm/hardware.h> | 20 | #include <asm/hardware.h> |
21 | #include <asm/arch/ixp2000-regs.h> | 21 | #include <asm/arch/hardware.h> |
22 | #include <asm/hardware/uengine.h> | 22 | #include <asm/hardware/uengine.h> |
23 | #include <asm/io.h> | 23 | #include <asm/io.h> |
24 | 24 | ||
25 | #if defined(CONFIG_ARCH_IXP2000) | ||
26 | #define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE | ||
27 | #define IXP_PRODUCT_ID IXP2000_PRODUCT_ID | ||
28 | #define IXP_MISC_CONTROL IXP2000_MISC_CONTROL | ||
29 | #define IXP_RESET1 IXP2000_RESET1 | ||
30 | #else | ||
31 | #if defined(CONFIG_ARCH_IXP23XX) | ||
32 | #define IXP_UENGINE_CSR_VIRT_BASE IXP23XX_UENGINE_CSR_VIRT_BASE | ||
33 | #define IXP_PRODUCT_ID IXP23XX_PRODUCT_ID | ||
34 | #define IXP_MISC_CONTROL IXP23XX_MISC_CONTROL | ||
35 | #define IXP_RESET1 IXP23XX_RESET1 | ||
36 | #else | ||
37 | #error unknown platform | ||
38 | #endif | ||
39 | #endif | ||
40 | |||
25 | #define USTORE_ADDRESS 0x000 | 41 | #define USTORE_ADDRESS 0x000 |
26 | #define USTORE_DATA_LOWER 0x004 | 42 | #define USTORE_DATA_LOWER 0x004 |
27 | #define USTORE_DATA_UPPER 0x008 | 43 | #define USTORE_DATA_UPPER 0x008 |
@@ -43,7 +59,7 @@ u32 ixp2000_uengine_mask; | |||
43 | 59 | ||
44 | static void *ixp2000_uengine_csr_area(int uengine) | 60 | static void *ixp2000_uengine_csr_area(int uengine) |
45 | { | 61 | { |
46 | return ((void *)IXP2000_UENGINE_CSR_VIRT_BASE) + (uengine << 10); | 62 | return ((void *)IXP_UENGINE_CSR_VIRT_BASE) + (uengine << 10); |
47 | } | 63 | } |
48 | 64 | ||
49 | /* | 65 | /* |
@@ -91,8 +107,13 @@ EXPORT_SYMBOL(ixp2000_uengine_csr_write); | |||
91 | 107 | ||
92 | void ixp2000_uengine_reset(u32 uengine_mask) | 108 | void ixp2000_uengine_reset(u32 uengine_mask) |
93 | { | 109 | { |
94 | ixp2000_reg_wrb(IXP2000_RESET1, uengine_mask & ixp2000_uengine_mask); | 110 | u32 value; |
95 | ixp2000_reg_wrb(IXP2000_RESET1, 0); | 111 | |
112 | value = ixp2000_reg_read(IXP_RESET1) & ~ixp2000_uengine_mask; | ||
113 | |||
114 | uengine_mask &= ixp2000_uengine_mask; | ||
115 | ixp2000_reg_wrb(IXP_RESET1, value | uengine_mask); | ||
116 | ixp2000_reg_wrb(IXP_RESET1, value); | ||
96 | } | 117 | } |
97 | EXPORT_SYMBOL(ixp2000_uengine_reset); | 118 | EXPORT_SYMBOL(ixp2000_uengine_reset); |
98 | 119 | ||
@@ -235,11 +256,12 @@ static int check_ixp_type(struct ixp2000_uengine_code *c) | |||
235 | u32 product_id; | 256 | u32 product_id; |
236 | u32 rev; | 257 | u32 rev; |
237 | 258 | ||
238 | product_id = ixp2000_reg_read(IXP2000_PRODUCT_ID); | 259 | product_id = ixp2000_reg_read(IXP_PRODUCT_ID); |
239 | if (((product_id >> 16) & 0x1f) != 0) | 260 | if (((product_id >> 16) & 0x1f) != 0) |
240 | return 0; | 261 | return 0; |
241 | 262 | ||
242 | switch ((product_id >> 8) & 0xff) { | 263 | switch ((product_id >> 8) & 0xff) { |
264 | #ifdef CONFIG_ARCH_IXP2000 | ||
243 | case 0: /* IXP2800 */ | 265 | case 0: /* IXP2800 */ |
244 | if (!(c->cpu_model_bitmask & 4)) | 266 | if (!(c->cpu_model_bitmask & 4)) |
245 | return 0; | 267 | return 0; |
@@ -254,6 +276,14 @@ static int check_ixp_type(struct ixp2000_uengine_code *c) | |||
254 | if (!(c->cpu_model_bitmask & 2)) | 276 | if (!(c->cpu_model_bitmask & 2)) |
255 | return 0; | 277 | return 0; |
256 | break; | 278 | break; |
279 | #endif | ||
280 | |||
281 | #ifdef CONFIG_ARCH_IXP23XX | ||
282 | case 4: /* IXP23xx */ | ||
283 | if (!(c->cpu_model_bitmask & 0x3f0)) | ||
284 | return 0; | ||
285 | break; | ||
286 | #endif | ||
257 | 287 | ||
258 | default: | 288 | default: |
259 | return 0; | 289 | return 0; |
@@ -432,7 +462,8 @@ static int __init ixp2000_uengine_init(void) | |||
432 | /* | 462 | /* |
433 | * Determine number of microengines present. | 463 | * Determine number of microengines present. |
434 | */ | 464 | */ |
435 | switch ((ixp2000_reg_read(IXP2000_PRODUCT_ID) >> 8) & 0x1fff) { | 465 | switch ((ixp2000_reg_read(IXP_PRODUCT_ID) >> 8) & 0x1fff) { |
466 | #ifdef CONFIG_ARCH_IXP2000 | ||
436 | case 0: /* IXP2800 */ | 467 | case 0: /* IXP2800 */ |
437 | case 1: /* IXP2850 */ | 468 | case 1: /* IXP2850 */ |
438 | ixp2000_uengine_mask = 0x00ff00ff; | 469 | ixp2000_uengine_mask = 0x00ff00ff; |
@@ -441,10 +472,17 @@ static int __init ixp2000_uengine_init(void) | |||
441 | case 2: /* IXP2400 */ | 472 | case 2: /* IXP2400 */ |
442 | ixp2000_uengine_mask = 0x000f000f; | 473 | ixp2000_uengine_mask = 0x000f000f; |
443 | break; | 474 | break; |
475 | #endif | ||
476 | |||
477 | #ifdef CONFIG_ARCH_IXP23XX | ||
478 | case 4: /* IXP23xx */ | ||
479 | ixp2000_uengine_mask = (*IXP23XX_EXP_CFG_FUSE >> 8) & 0xf; | ||
480 | break; | ||
481 | #endif | ||
444 | 482 | ||
445 | default: | 483 | default: |
446 | printk(KERN_INFO "Detected unknown IXP2000 model (%.8x)\n", | 484 | printk(KERN_INFO "Detected unknown IXP2000 model (%.8x)\n", |
447 | (unsigned int)ixp2000_reg_read(IXP2000_PRODUCT_ID)); | 485 | (unsigned int)ixp2000_reg_read(IXP_PRODUCT_ID)); |
448 | ixp2000_uengine_mask = 0x00000000; | 486 | ixp2000_uengine_mask = 0x00000000; |
449 | break; | 487 | break; |
450 | } | 488 | } |
@@ -457,15 +495,15 @@ static int __init ixp2000_uengine_init(void) | |||
457 | /* | 495 | /* |
458 | * Synchronise timestamp counters across all microengines. | 496 | * Synchronise timestamp counters across all microengines. |
459 | */ | 497 | */ |
460 | value = ixp2000_reg_read(IXP2000_MISC_CONTROL); | 498 | value = ixp2000_reg_read(IXP_MISC_CONTROL); |
461 | ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value & ~0x80); | 499 | ixp2000_reg_wrb(IXP_MISC_CONTROL, value & ~0x80); |
462 | for (uengine = 0; uengine < 32; uengine++) { | 500 | for (uengine = 0; uengine < 32; uengine++) { |
463 | if (ixp2000_uengine_mask & (1 << uengine)) { | 501 | if (ixp2000_uengine_mask & (1 << uengine)) { |
464 | ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0); | 502 | ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0); |
465 | ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0); | 503 | ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0); |
466 | } | 504 | } |
467 | } | 505 | } |
468 | ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value | 0x80); | 506 | ixp2000_reg_wrb(IXP_MISC_CONTROL, value | 0x80); |
469 | 507 | ||
470 | return 0; | 508 | return 0; |
471 | } | 509 | } |