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authorMarc Zyngier <marc.zyngier@arm.com>2011-07-22 07:52:37 -0400
committerMarc Zyngier <marc.zyngier@arm.com>2011-10-23 08:32:33 -0400
commit28af690a284dfcb627bd69d0963db1c0f412cb8c (patch)
tree6daa595281c87b5bfee4cca79492a724deb1cfbc /arch/arm/common
parent292b293ceef2eda1f96f0c90b96e954d7bdabd1c (diff)
ARM: gic, local timers: use the request_percpu_irq() interface
This patch remove the hardcoded link between local timers and PPIs, and convert the PPI users (TWD, MCT and MSM timers) to the new *_percpu_irq interface. Also some collateral cleanup (local_timer_ack() is gone, and the interrupt handler is strictly private to each driver). PPIs are now useable for more than just the local timers. Additional testing by David Brown (msm8250 and msm8660) and Shawn Guo (imx6q). Cc: David Brown <davidb@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm/common')
-rw-r--r--arch/arm/common/gic.c52
1 files changed, 0 insertions, 52 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index bbea0168779b..a2b320503931 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -35,7 +35,6 @@
35#include <asm/irq.h> 35#include <asm/irq.h>
36#include <asm/mach/irq.h> 36#include <asm/mach/irq.h>
37#include <asm/hardware/gic.h> 37#include <asm/hardware/gic.h>
38#include <asm/localtimer.h>
39 38
40static DEFINE_SPINLOCK(irq_controller_lock); 39static DEFINE_SPINLOCK(irq_controller_lock);
41 40
@@ -259,32 +258,6 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
259 irq_set_chained_handler(irq, gic_handle_cascade_irq); 258 irq_set_chained_handler(irq, gic_handle_cascade_irq);
260} 259}
261 260
262#ifdef CONFIG_LOCAL_TIMERS
263#define gic_ppi_handler percpu_timer_handler
264#else
265static irqreturn_t gic_ppi_handler(int irq, void *dev_id)
266{
267 return IRQ_NONE;
268}
269#endif
270
271#define PPI_IRQACT(nr) \
272 { \
273 .handler = gic_ppi_handler, \
274 .flags = IRQF_PERCPU | IRQF_TIMER, \
275 .irq = nr, \
276 .name = "PPI-" # nr, \
277 }
278
279static struct irqaction ppi_irqaction_template[16] __initdata = {
280 PPI_IRQACT(0), PPI_IRQACT(1), PPI_IRQACT(2), PPI_IRQACT(3),
281 PPI_IRQACT(4), PPI_IRQACT(5), PPI_IRQACT(6), PPI_IRQACT(7),
282 PPI_IRQACT(8), PPI_IRQACT(9), PPI_IRQACT(10), PPI_IRQACT(11),
283 PPI_IRQACT(12), PPI_IRQACT(13), PPI_IRQACT(14), PPI_IRQACT(15),
284};
285
286static struct irqaction *ppi_irqaction;
287
288static void __init gic_dist_init(struct gic_chip_data *gic, 261static void __init gic_dist_init(struct gic_chip_data *gic,
289 unsigned int irq_start) 262 unsigned int irq_start)
290{ 263{
@@ -325,16 +298,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic,
325 BUG(); 298 BUG();
326 299
327 ppi_base = gic->irq_offset + 32 - nrppis; 300 ppi_base = gic->irq_offset + 32 - nrppis;
328
329 ppi_irqaction = kmemdup(&ppi_irqaction_template[16 - nrppis],
330 sizeof(*ppi_irqaction) * nrppis,
331 GFP_KERNEL);
332
333 if (nrppis && !ppi_irqaction) {
334 pr_err("GIC: Can't allocate PPI memory");
335 nrppis = 0;
336 ppi_base = 0;
337 }
338 } 301 }
339 302
340 pr_info("Configuring GIC with %d sources (%d PPIs)\n", 303 pr_info("Configuring GIC with %d sources (%d PPIs)\n",
@@ -377,17 +340,12 @@ static void __init gic_dist_init(struct gic_chip_data *gic,
377 */ 340 */
378 for (i = 0; i < nrppis; i++) { 341 for (i = 0; i < nrppis; i++) {
379 int ppi = i + ppi_base; 342 int ppi = i + ppi_base;
380 int err;
381 343
382 irq_set_percpu_devid(ppi); 344 irq_set_percpu_devid(ppi);
383 irq_set_chip_and_handler(ppi, &gic_chip, 345 irq_set_chip_and_handler(ppi, &gic_chip,
384 handle_percpu_devid_irq); 346 handle_percpu_devid_irq);
385 irq_set_chip_data(ppi, gic); 347 irq_set_chip_data(ppi, gic);
386 set_irq_flags(ppi, IRQF_VALID | IRQF_NOAUTOEN); 348 set_irq_flags(ppi, IRQF_VALID | IRQF_NOAUTOEN);
387
388 err = setup_percpu_irq(ppi, &ppi_irqaction[i]);
389 if (err)
390 pr_err("GIC: can't setup PPI%d (%d)\n", ppi, err);
391 } 349 }
392 350
393 for (i = irq_start + nrppis; i < irq_limit; i++) { 351 for (i = irq_start + nrppis; i < irq_limit; i++) {
@@ -448,16 +406,6 @@ void __cpuinit gic_secondary_init(unsigned int gic_nr)
448 gic_cpu_init(&gic_data[gic_nr]); 406 gic_cpu_init(&gic_data[gic_nr]);
449} 407}
450 408
451void __cpuinit gic_enable_ppi(unsigned int irq)
452{
453 unsigned long flags;
454
455 local_irq_save(flags);
456 irq_set_status_flags(irq, IRQ_NOPROBE);
457 gic_unmask_irq(irq_get_irq_data(irq));
458 local_irq_restore(flags);
459}
460
461#ifdef CONFIG_SMP 409#ifdef CONFIG_SMP
462void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) 410void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
463{ 411{