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authorTim Kryger <tim.kryger@linaro.org>2013-09-23 13:49:57 -0400
committerOlof Johansson <olof@lixom.net>2013-10-31 13:29:56 -0400
commit84491c0fc5ecda6ae020179dd68b32d15dc14f36 (patch)
tree252d138baa3d0dedb3ab1c3d5fd6ba4a5cdd2634 /arch/arm/boot
parent71469fe801082ca09f25d9b76c6bd8ab8ba02447 (diff)
ARM: dts: bcm: Add missing UARTs for bcm11351 (bcm281xx)
This adds in three more UARTs that were not declared earlier. Signed-off-by: Tim Kryger <tim.kryger@linaro.org> Reviewed-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Christian Daudt <bcm@fixthebug.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/bcm11351.dtsi30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
index 77af39668090..d2a89688716f 100644
--- a/arch/arm/boot/dts/bcm11351.dtsi
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -49,6 +49,36 @@
49 reg-io-width = <4>; 49 reg-io-width = <4>;
50 }; 50 };
51 51
52 uart@3e001000 {
53 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
54 status = "disabled";
55 reg = <0x3e001000 0x1000>;
56 clock-frequency = <13000000>;
57 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
58 reg-shift = <2>;
59 reg-io-width = <4>;
60 };
61
62 uart@3e002000 {
63 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
64 status = "disabled";
65 reg = <0x3e002000 0x1000>;
66 clock-frequency = <13000000>;
67 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
68 reg-shift = <2>;
69 reg-io-width = <4>;
70 };
71
72 uart@3e003000 {
73 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
74 status = "disabled";
75 reg = <0x3e003000 0x1000>;
76 clock-frequency = <13000000>;
77 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
78 reg-shift = <2>;
79 reg-io-width = <4>;
80 };
81
52 L2: l2-cache { 82 L2: l2-cache {
53 compatible = "brcm,bcm11351-a2-pl310-cache"; 83 compatible = "brcm,bcm11351-a2-pl310-cache";
54 reg = <0x3ff20000 0x1000>; 84 reg = <0x3ff20000 0x1000>;