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authorBenoit Cousson <b-cousson@ti.com>2011-08-16 11:32:01 -0400
committerBenoit Cousson <b-cousson@ti.com>2011-10-04 16:27:02 -0400
commit189892f496cd01bf1af149bd6f7f380fcf67489d (patch)
tree0fabf6e3b648cb30d86df6d146fd7a6ffa42c372 /arch/arm/boot
parent492beedfd80e48be48211b5e7bce9b85fb141a81 (diff)
arm/dts: Add initial device tree support for OMAP3 SoC
Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/omap3.dtsi44
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
new file mode 100644
index 000000000000..d558785c8b2c
--- /dev/null
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -0,0 +1,44 @@
1/*
2 * Device Tree Source for OMAP3 SoC
3 *
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 compatible = "ti,omap3430", "ti,omap3";
15
16 /*
17 * The soc node represents the soc top level view. It is uses for IPs
18 * that are not memory mapped in the MPU view or for the MPU itself.
19 */
20 soc {
21 compatible = "ti,omap-infra";
22 };
23
24 /*
25 * XXX: Use a flat representation of the OMAP3 interconnect.
26 * The real OMAP interconnect network is quite complex.
27 * Since that will not bring real advantage to represent that in DT for
28 * the moment, just use a fake OCP bus entry to represent the whole bus
29 * hierarchy.
30 */
31 ocp {
32 compatible = "simple-bus";
33 #address-cells = <1>;
34 #size-cells = <1>;
35 ranges;
36 ti,hwmods = "l3_main";
37
38 intc: interrupt-controller@1 {
39 compatible = "ti,omap3-intc";
40 interrupt-controller;
41 #interrupt-cells = <1>;
42 };
43 };
44};