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authorStephen Warren <swarren@nvidia.com>2012-05-11 18:17:47 -0400
committerStephen Warren <swarren@nvidia.com>2012-05-14 12:55:00 -0400
commitf9eb26a4e11c63bba2fb71b58dff5ed6f33091f9 (patch)
treeddaad1df61892825401bf550871127e9c8dfe4d6 /arch/arm/boot
parent95decf84742d712a5875bb655cd7440f6d7c1184 (diff)
ARM: dt: tegra: remove unnecessary unit addresses
DT node names only need to include the unit address if it's required to make the node name unique. Remove the unnecessary unit addresses. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/tegra-cardhu.dts4
-rw-r--r--arch/arm/boot/dts/tegra-harmony.dts6
-rw-r--r--arch/arm/boot/dts/tegra-paz00.dts6
-rw-r--r--arch/arm/boot/dts/tegra-seaboard.dts4
-rw-r--r--arch/arm/boot/dts/tegra-trimslice.dts4
-rw-r--r--arch/arm/boot/dts/tegra-ventana.dts2
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi16
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi12
8 files changed, 27 insertions, 27 deletions
diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts
index 378b65e186e8..653d62891791 100644
--- a/arch/arm/boot/dts/tegra-cardhu.dts
+++ b/arch/arm/boot/dts/tegra-cardhu.dts
@@ -10,7 +10,7 @@
10 reg = <0x80000000 0x40000000>; 10 reg = <0x80000000 0x40000000>;
11 }; 11 };
12 12
13 pinmux@70000000 { 13 pinmux {
14 pinctrl-names = "default"; 14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 15 pinctrl-0 = <&state_default>;
16 16
@@ -156,7 +156,7 @@
156 support-8bit; 156 support-8bit;
157 }; 157 };
158 158
159 ahub@70080000 { 159 ahub {
160 i2s@70080300 { 160 i2s@70080300 {
161 status = "disable"; 161 status = "disable";
162 }; 162 };
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 04647b3175db..759e289e7f87 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -6,11 +6,11 @@
6 model = "NVIDIA Tegra2 Harmony evaluation board"; 6 model = "NVIDIA Tegra2 Harmony evaluation board";
7 compatible = "nvidia,harmony", "nvidia,tegra20"; 7 compatible = "nvidia,harmony", "nvidia,tegra20";
8 8
9 memory@0 { 9 memory {
10 reg = <0x00000000 0x40000000>; 10 reg = <0x00000000 0x40000000>;
11 }; 11 };
12 12
13 pinmux@70000000 { 13 pinmux {
14 pinctrl-names = "default"; 14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 15 pinctrl-0 = <&state_default>;
16 16
@@ -234,7 +234,7 @@
234 }; 234 };
235 }; 235 };
236 236
237 pmc@7000f400 { 237 pmc {
238 nvidia,invert-interrupt; 238 nvidia,invert-interrupt;
239 }; 239 };
240 240
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
index 34a917710e09..4983ef116831 100644
--- a/arch/arm/boot/dts/tegra-paz00.dts
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -6,11 +6,11 @@
6 model = "Toshiba AC100 / Dynabook AZ"; 6 model = "Toshiba AC100 / Dynabook AZ";
7 compatible = "compal,paz00", "nvidia,tegra20"; 7 compatible = "compal,paz00", "nvidia,tegra20";
8 8
9 memory@0 { 9 memory {
10 reg = <0x00000000 0x20000000>; 10 reg = <0x00000000 0x20000000>;
11 }; 11 };
12 12
13 pinmux@70000000 { 13 pinmux {
14 pinctrl-names = "default"; 14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 15 pinctrl-0 = <&state_default>;
16 16
@@ -245,7 +245,7 @@
245 status = "disable"; 245 status = "disable";
246 }; 246 };
247 247
248 nvec@7000c500 { 248 nvec {
249 #address-cells = <1>; 249 #address-cells = <1>;
250 #size-cells = <0>; 250 #size-cells = <0>;
251 compatible = "nvidia,nvec"; 251 compatible = "nvidia,nvec";
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index d4cbd8054c07..ea93332ef9a0 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -11,7 +11,7 @@
11 reg = <0x00000000 0x40000000>; 11 reg = <0x00000000 0x40000000>;
12 }; 12 };
13 13
14 pinmux@70000000 { 14 pinmux {
15 pinctrl-names = "default"; 15 pinctrl-names = "default";
16 pinctrl-0 = <&state_default>; 16 pinctrl-0 = <&state_default>;
17 17
@@ -411,7 +411,7 @@
411 }; 411 };
412 }; 412 };
413 413
414 emc@7000f400 { 414 emc {
415 emc-table@190000 { 415 emc-table@190000 {
416 reg = <190000>; 416 reg = <190000>;
417 compatible = "nvidia,tegra20-emc-table"; 417 compatible = "nvidia,tegra20-emc-table";
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts
index 7181a5e9e48b..4436b42be4a2 100644
--- a/arch/arm/boot/dts/tegra-trimslice.dts
+++ b/arch/arm/boot/dts/tegra-trimslice.dts
@@ -6,11 +6,11 @@
6 model = "Compulab TrimSlice board"; 6 model = "Compulab TrimSlice board";
7 compatible = "compulab,trimslice", "nvidia,tegra20"; 7 compatible = "compulab,trimslice", "nvidia,tegra20";
8 8
9 memory@0 { 9 memory {
10 reg = <0x00000000 0x40000000>; 10 reg = <0x00000000 0x40000000>;
11 }; 11 };
12 12
13 pinmux@70000000 { 13 pinmux {
14 pinctrl-names = "default"; 14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 15 pinctrl-0 = <&state_default>;
16 16
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index 9d2bc270b35b..0c8d30d9c2fa 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -10,7 +10,7 @@
10 reg = <0x00000000 0x40000000>; 10 reg = <0x00000000 0x40000000>;
11 }; 11 };
12 12
13 pinmux@70000000 { 13 pinmux {
14 pinctrl-names = "default"; 14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 15 pinctrl-0 = <&state_default>;
16 16
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index f98be33da708..a6b135164ae0 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -4,12 +4,12 @@
4 compatible = "nvidia,tegra20"; 4 compatible = "nvidia,tegra20";
5 interrupt-parent = <&intc>; 5 interrupt-parent = <&intc>;
6 6
7 pmc@7000f400 { 7 pmc {
8 compatible = "nvidia,tegra20-pmc"; 8 compatible = "nvidia,tegra20-pmc";
9 reg = <0x7000e400 0x400>; 9 reg = <0x7000e400 0x400>;
10 }; 10 };
11 11
12 intc: interrupt-controller@50041000 { 12 intc: interrupt-controller {
13 compatible = "arm,cortex-a9-gic"; 13 compatible = "arm,cortex-a9-gic";
14 interrupt-controller; 14 interrupt-controller;
15 #interrupt-cells = <3>; 15 #interrupt-cells = <3>;
@@ -23,7 +23,7 @@
23 0 57 0x04>; 23 0 57 0x04>;
24 }; 24 };
25 25
26 apbdma: dma@6000a000 { 26 apbdma: dma {
27 compatible = "nvidia,tegra20-apbdma"; 27 compatible = "nvidia,tegra20-apbdma";
28 reg = <0x6000a000 0x1200>; 28 reg = <0x6000a000 0x1200>;
29 interrupts = <0 104 0x04 29 interrupts = <0 104 0x04
@@ -90,12 +90,12 @@
90 nvidia,dma-request-selector = <&apbdma 1>; 90 nvidia,dma-request-selector = <&apbdma 1>;
91 }; 91 };
92 92
93 das@70000c00 { 93 das {
94 compatible = "nvidia,tegra20-das"; 94 compatible = "nvidia,tegra20-das";
95 reg = <0x70000c00 0x80>; 95 reg = <0x70000c00 0x80>;
96 }; 96 };
97 97
98 gpio: gpio@6000d000 { 98 gpio: gpio {
99 compatible = "nvidia,tegra20-gpio"; 99 compatible = "nvidia,tegra20-gpio";
100 reg = <0x6000d000 0x1000>; 100 reg = <0x6000d000 0x1000>;
101 interrupts = <0 32 0x04 101 interrupts = <0 32 0x04
@@ -111,7 +111,7 @@
111 interrupt-controller; 111 interrupt-controller;
112 }; 112 };
113 113
114 pinmux: pinmux@70000000 { 114 pinmux: pinmux {
115 compatible = "nvidia,tegra20-pinmux"; 115 compatible = "nvidia,tegra20-pinmux";
116 reg = <0x70000014 0x10 /* Tri-state registers */ 116 reg = <0x70000014 0x10 /* Tri-state registers */
117 0x70000080 0x20 /* Mux registers */ 117 0x70000080 0x20 /* Mux registers */
@@ -154,7 +154,7 @@
154 interrupts = <0 91 0x04>; 154 interrupts = <0 91 0x04>;
155 }; 155 };
156 156
157 emc@7000f400 { 157 emc {
158 #address-cells = <1>; 158 #address-cells = <1>;
159 #size-cells = <0>; 159 #size-cells = <0>;
160 compatible = "nvidia,tegra20-emc"; 160 compatible = "nvidia,tegra20-emc";
@@ -207,7 +207,7 @@
207 phy_type = "utmi"; 207 phy_type = "utmi";
208 }; 208 };
209 209
210 ahb: ahb@6000c004 { 210 ahb {
211 compatible = "nvidia,tegra20-ahb"; 211 compatible = "nvidia,tegra20-ahb";
212 reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ 212 reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */
213 }; 213 };
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 5dd6556fce01..45547ad82972 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -4,12 +4,12 @@
4 compatible = "nvidia,tegra30"; 4 compatible = "nvidia,tegra30";
5 interrupt-parent = <&intc>; 5 interrupt-parent = <&intc>;
6 6
7 pmc@7000f400 { 7 pmc {
8 compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; 8 compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
9 reg = <0x7000e400 0x400>; 9 reg = <0x7000e400 0x400>;
10 }; 10 };
11 11
12 intc: interrupt-controller@50041000 { 12 intc: interrupt-controller {
13 compatible = "arm,cortex-a9-gic"; 13 compatible = "arm,cortex-a9-gic";
14 interrupt-controller; 14 interrupt-controller;
15 #interrupt-cells = <3>; 15 #interrupt-cells = <3>;
@@ -25,7 +25,7 @@
25 0 147 0x04>; 25 0 147 0x04>;
26 }; 26 };
27 27
28 apbdma: dma@6000a000 { 28 apbdma: dma {
29 compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma"; 29 compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
30 reg = <0x6000a000 0x1400>; 30 reg = <0x6000a000 0x1400>;
31 interrupts = <0 104 0x04 31 interrupts = <0 104 0x04
@@ -102,7 +102,7 @@
102 interrupts = <0 53 0x04>; 102 interrupts = <0 53 0x04>;
103 }; 103 };
104 104
105 gpio: gpio@6000d000 { 105 gpio: gpio {
106 compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio"; 106 compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
107 reg = <0x6000d000 0x1000>; 107 reg = <0x6000d000 0x1000>;
108 interrupts = <0 32 0x04 108 interrupts = <0 32 0x04
@@ -178,7 +178,7 @@
178 interrupts = <0 31 0x04>; 178 interrupts = <0 31 0x04>;
179 }; 179 };
180 180
181 pinmux: pinmux@70000000 { 181 pinmux: pinmux {
182 compatible = "nvidia,tegra30-pinmux"; 182 compatible = "nvidia,tegra30-pinmux";
183 reg = <0x70000868 0xd0 /* Pad control registers */ 183 reg = <0x70000868 0xd0 /* Pad control registers */
184 0x70003000 0x3e0>; /* Mux registers */ 184 0x70003000 0x3e0>; /* Mux registers */
@@ -225,7 +225,7 @@
225 }; 225 };
226 }; 226 };
227 227
228 ahb: ahb@6000c004 { 228 ahb: ahb {
229 compatible = "nvidia,tegra30-ahb"; 229 compatible = "nvidia,tegra30-ahb";
230 reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */ 230 reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */
231 }; 231 };