diff options
author | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 09:07:51 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 09:07:51 -0400 |
commit | 86c1e5a74af11e4817ffa6d7748d9ac1353b5b53 (patch) | |
tree | 377327a40452c4282787f49456122bf1753a0255 /arch/arm/boot | |
parent | 6a8d2e2b504ce3d12cfa3934f545c9415441a5c3 (diff) | |
parent | 3ae3e253db7385238dd9d6c67c085afa3e770a56 (diff) |
Merge branch 'omap/dt' into next/dt
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/omap3-beagle.dts | 29 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap3.dtsi | 63 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap4-panda.dts | 29 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap4-sdp.dts | 29 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap4.dtsi | 103 |
5 files changed, 253 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts new file mode 100644 index 000000000000..9486be62bcdd --- /dev/null +++ b/arch/arm/boot/dts/omap3-beagle.dts | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /dts-v1/; | ||
9 | |||
10 | /include/ "omap3.dtsi" | ||
11 | |||
12 | / { | ||
13 | model = "TI OMAP3 BeagleBoard"; | ||
14 | compatible = "ti,omap3-beagle", "ti,omap3"; | ||
15 | |||
16 | /* | ||
17 | * Since the initial device tree board file does not create any | ||
18 | * devices (MMC, network...), the only way to boot is to provide a | ||
19 | * ramdisk. | ||
20 | */ | ||
21 | chosen { | ||
22 | bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug earlyprintk"; | ||
23 | }; | ||
24 | |||
25 | memory { | ||
26 | device_type = "memory"; | ||
27 | reg = <0x80000000 0x20000000>; /* 512 MB */ | ||
28 | }; | ||
29 | }; | ||
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi new file mode 100644 index 000000000000..d202bb5ec7ef --- /dev/null +++ b/arch/arm/boot/dts/omap3.dtsi | |||
@@ -0,0 +1,63 @@ | |||
1 | /* | ||
2 | * Device Tree Source for OMAP3 SoC | ||
3 | * | ||
4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public License | ||
7 | * version 2. This program is licensed "as is" without any warranty of any | ||
8 | * kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | /include/ "skeleton.dtsi" | ||
12 | |||
13 | / { | ||
14 | compatible = "ti,omap3430", "ti,omap3"; | ||
15 | |||
16 | cpus { | ||
17 | cpu@0 { | ||
18 | compatible = "arm,cortex-a8"; | ||
19 | }; | ||
20 | }; | ||
21 | |||
22 | /* | ||
23 | * The soc node represents the soc top level view. It is uses for IPs | ||
24 | * that are not memory mapped in the MPU view or for the MPU itself. | ||
25 | */ | ||
26 | soc { | ||
27 | compatible = "ti,omap-infra"; | ||
28 | mpu { | ||
29 | compatible = "ti,omap3-mpu"; | ||
30 | ti,hwmods = "mpu"; | ||
31 | }; | ||
32 | |||
33 | iva { | ||
34 | compatible = "ti,iva2.2"; | ||
35 | ti,hwmods = "iva"; | ||
36 | |||
37 | dsp { | ||
38 | compatible = "ti,omap3-c64"; | ||
39 | }; | ||
40 | }; | ||
41 | }; | ||
42 | |||
43 | /* | ||
44 | * XXX: Use a flat representation of the OMAP3 interconnect. | ||
45 | * The real OMAP interconnect network is quite complex. | ||
46 | * Since that will not bring real advantage to represent that in DT for | ||
47 | * the moment, just use a fake OCP bus entry to represent the whole bus | ||
48 | * hierarchy. | ||
49 | */ | ||
50 | ocp { | ||
51 | compatible = "simple-bus"; | ||
52 | #address-cells = <1>; | ||
53 | #size-cells = <1>; | ||
54 | ranges; | ||
55 | ti,hwmods = "l3_main"; | ||
56 | |||
57 | intc: interrupt-controller@1 { | ||
58 | compatible = "ti,omap3-intc"; | ||
59 | interrupt-controller; | ||
60 | #interrupt-cells = <1>; | ||
61 | }; | ||
62 | }; | ||
63 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts new file mode 100644 index 000000000000..c7026578ce7d --- /dev/null +++ b/arch/arm/boot/dts/omap4-panda.dts | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /dts-v1/; | ||
9 | |||
10 | /include/ "omap4.dtsi" | ||
11 | |||
12 | / { | ||
13 | model = "TI OMAP4 PandaBoard"; | ||
14 | compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4"; | ||
15 | |||
16 | /* | ||
17 | * Since the initial device tree board file does not create any | ||
18 | * devices (MMC, network...), the only way to boot is to provide a | ||
19 | * ramdisk. | ||
20 | */ | ||
21 | chosen { | ||
22 | bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug"; | ||
23 | }; | ||
24 | |||
25 | memory { | ||
26 | device_type = "memory"; | ||
27 | reg = <0x80000000 0x40000000>; /* 1 GB */ | ||
28 | }; | ||
29 | }; | ||
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts new file mode 100644 index 000000000000..066e28c90328 --- /dev/null +++ b/arch/arm/boot/dts/omap4-sdp.dts | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /dts-v1/; | ||
9 | |||
10 | /include/ "omap4.dtsi" | ||
11 | |||
12 | / { | ||
13 | model = "TI OMAP4 SDP board"; | ||
14 | compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4"; | ||
15 | |||
16 | /* | ||
17 | * Since the initial device tree board file does not create any | ||
18 | * devices (MMC, network...), the only way to boot is to provide a | ||
19 | * ramdisk. | ||
20 | */ | ||
21 | chosen { | ||
22 | bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug"; | ||
23 | }; | ||
24 | |||
25 | memory { | ||
26 | device_type = "memory"; | ||
27 | reg = <0x80000000 0x40000000>; /* 1 GB */ | ||
28 | }; | ||
29 | }; | ||
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi new file mode 100644 index 000000000000..4c61c829043a --- /dev/null +++ b/arch/arm/boot/dts/omap4.dtsi | |||
@@ -0,0 +1,103 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * Carveout for multimedia usecases | ||
11 | * It should be the last 48MB of the first 512MB memory part | ||
12 | * In theory, it should not even exist. That zone should be reserved | ||
13 | * dynamically during the .reserve callback. | ||
14 | */ | ||
15 | /memreserve/ 0x9d000000 0x03000000; | ||
16 | |||
17 | /include/ "skeleton.dtsi" | ||
18 | |||
19 | / { | ||
20 | compatible = "ti,omap4430", "ti,omap4"; | ||
21 | interrupt-parent = <&gic>; | ||
22 | |||
23 | aliases { | ||
24 | }; | ||
25 | |||
26 | cpus { | ||
27 | cpu@0 { | ||
28 | compatible = "arm,cortex-a9"; | ||
29 | }; | ||
30 | cpu@1 { | ||
31 | compatible = "arm,cortex-a9"; | ||
32 | }; | ||
33 | }; | ||
34 | |||
35 | /* | ||
36 | * The soc node represents the soc top level view. It is uses for IPs | ||
37 | * that are not memory mapped in the MPU view or for the MPU itself. | ||
38 | */ | ||
39 | soc { | ||
40 | compatible = "ti,omap-infra"; | ||
41 | mpu { | ||
42 | compatible = "ti,omap4-mpu"; | ||
43 | ti,hwmods = "mpu"; | ||
44 | }; | ||
45 | |||
46 | dsp { | ||
47 | compatible = "ti,omap3-c64"; | ||
48 | ti,hwmods = "dsp"; | ||
49 | }; | ||
50 | |||
51 | iva { | ||
52 | compatible = "ti,ivahd"; | ||
53 | ti,hwmods = "iva"; | ||
54 | }; | ||
55 | }; | ||
56 | |||
57 | /* | ||
58 | * XXX: Use a flat representation of the OMAP4 interconnect. | ||
59 | * The real OMAP interconnect network is quite complex. | ||
60 | * | ||
61 | * MPU -+-- MPU_PRIVATE - GIC, L2 | ||
62 | * | | ||
63 | * +----------------+----------+ | ||
64 | * | | | | ||
65 | * + +- EMIF - DDR | | ||
66 | * | | | | ||
67 | * | + +--------+ | ||
68 | * | | | | ||
69 | * | +- L4_ABE - AESS, MCBSP, TIMERs... | ||
70 | * | | | ||
71 | * +- L3_MAIN --+- L4_CORE - IPs... | ||
72 | * | | ||
73 | * +- L4_PER - IPs... | ||
74 | * | | ||
75 | * +- L4_CFG -+- L4_WKUP - IPs... | ||
76 | * | | | ||
77 | * | +- IPs... | ||
78 | * +- IPU ----+ | ||
79 | * | | | ||
80 | * +- DSP ----+ | ||
81 | * | | | ||
82 | * +- DSS ----+ | ||
83 | * | ||
84 | * Since that will not bring real advantage to represent that in DT for | ||
85 | * the moment, just use a fake OCP bus entry to represent the whole bus | ||
86 | * hierarchy. | ||
87 | */ | ||
88 | ocp { | ||
89 | compatible = "ti,omap4-l3-noc", "simple-bus"; | ||
90 | #address-cells = <1>; | ||
91 | #size-cells = <1>; | ||
92 | ranges; | ||
93 | ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; | ||
94 | |||
95 | gic: interrupt-controller@48241000 { | ||
96 | compatible = "arm,cortex-a9-gic"; | ||
97 | interrupt-controller; | ||
98 | #interrupt-cells = <1>; | ||
99 | reg = <0x48241000 0x1000>, | ||
100 | <0x48240100 0x0100>; | ||
101 | }; | ||
102 | }; | ||
103 | }; | ||