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authorTony Lindgren <tony@atomide.com>2014-09-09 22:28:41 -0400
committerTony Lindgren <tony@atomide.com>2014-09-09 22:28:41 -0400
commit6e5542604ab64d9a7866226bbab3725532caf070 (patch)
tree223271abe58c4bff4e096aa5fe9ca1271ecb679b /arch/arm/boot
parent83c9b2afe66abf5dc6dab68da738557001fb5660 (diff)
parent66b0436977e2c62388d48836ff784f1fedb49c4f (diff)
Merge branch 'pull/v3.18/for-dt-pinctrl-updates' of https://github.com/nmenon/linux-2.6-playground into omap-for-v3.18/dt
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/am4372.dtsi4
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts2
-rw-r--r--arch/arm/boot/dts/dra7.dtsi24
-rw-r--r--arch/arm/boot/dts/omap5.dtsi20
4 files changed, 30 insertions, 20 deletions
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 9b3d2ba82f13..b3848306f329 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -58,10 +58,12 @@
58 }; 58 };
59 59
60 am43xx_pinmux: pinmux@44e10800 { 60 am43xx_pinmux: pinmux@44e10800 {
61 compatible = "pinctrl-single"; 61 compatible = "ti,am437-padconf", "pinctrl-single";
62 reg = <0x44e10800 0x31c>; 62 reg = <0x44e10800 0x31c>;
63 #address-cells = <1>; 63 #address-cells = <1>;
64 #size-cells = <0>; 64 #size-cells = <0>;
65 #interrupt-cells = <1>;
66 interrupt-controller;
65 pinctrl-single,register-width = <32>; 67 pinctrl-single,register-width = <32>;
66 pinctrl-single,function-mask = <0xffffffff>; 68 pinctrl-single,function-mask = <0xffffffff>;
67 }; 69 };
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 50f8022905a1..08434c7b9759 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -303,6 +303,8 @@
303 status = "okay"; 303 status = "okay";
304 pinctrl-names = "default"; 304 pinctrl-names = "default";
305 pinctrl-0 = <&uart1_pins>; 305 pinctrl-0 = <&uart1_pins>;
306 interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
307 <&dra7_pmx_core 0x3e0>;
306}; 308};
307 309
308&uart2 { 310&uart2 {
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d678152db4cb..1fd6b931490f 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -217,10 +217,12 @@
217 }; 217 };
218 218
219 dra7_pmx_core: pinmux@4a003400 { 219 dra7_pmx_core: pinmux@4a003400 {
220 compatible = "pinctrl-single"; 220 compatible = "ti,dra7-padconf", "pinctrl-single";
221 reg = <0x4a003400 0x0464>; 221 reg = <0x4a003400 0x0464>;
222 #address-cells = <1>; 222 #address-cells = <1>;
223 #size-cells = <0>; 223 #size-cells = <0>;
224 #interrupt-cells = <1>;
225 interrupt-controller;
224 pinctrl-single,register-width = <32>; 226 pinctrl-single,register-width = <32>;
225 pinctrl-single,function-mask = <0x3fffffff>; 227 pinctrl-single,function-mask = <0x3fffffff>;
226 }; 228 };
@@ -328,7 +330,7 @@
328 uart1: serial@4806a000 { 330 uart1: serial@4806a000 {
329 compatible = "ti,omap4-uart"; 331 compatible = "ti,omap4-uart";
330 reg = <0x4806a000 0x100>; 332 reg = <0x4806a000 0x100>;
331 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 333 interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
332 ti,hwmods = "uart1"; 334 ti,hwmods = "uart1";
333 clock-frequency = <48000000>; 335 clock-frequency = <48000000>;
334 status = "disabled"; 336 status = "disabled";
@@ -337,7 +339,7 @@
337 uart2: serial@4806c000 { 339 uart2: serial@4806c000 {
338 compatible = "ti,omap4-uart"; 340 compatible = "ti,omap4-uart";
339 reg = <0x4806c000 0x100>; 341 reg = <0x4806c000 0x100>;
340 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 342 interrupts-extended = <&gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
341 ti,hwmods = "uart2"; 343 ti,hwmods = "uart2";
342 clock-frequency = <48000000>; 344 clock-frequency = <48000000>;
343 status = "disabled"; 345 status = "disabled";
@@ -346,7 +348,7 @@
346 uart3: serial@48020000 { 348 uart3: serial@48020000 {
347 compatible = "ti,omap4-uart"; 349 compatible = "ti,omap4-uart";
348 reg = <0x48020000 0x100>; 350 reg = <0x48020000 0x100>;
349 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 351 interrupts-extended = <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
350 ti,hwmods = "uart3"; 352 ti,hwmods = "uart3";
351 clock-frequency = <48000000>; 353 clock-frequency = <48000000>;
352 status = "disabled"; 354 status = "disabled";
@@ -355,7 +357,7 @@
355 uart4: serial@4806e000 { 357 uart4: serial@4806e000 {
356 compatible = "ti,omap4-uart"; 358 compatible = "ti,omap4-uart";
357 reg = <0x4806e000 0x100>; 359 reg = <0x4806e000 0x100>;
358 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 360 interrupts-extended = <&gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
359 ti,hwmods = "uart4"; 361 ti,hwmods = "uart4";
360 clock-frequency = <48000000>; 362 clock-frequency = <48000000>;
361 status = "disabled"; 363 status = "disabled";
@@ -364,7 +366,7 @@
364 uart5: serial@48066000 { 366 uart5: serial@48066000 {
365 compatible = "ti,omap4-uart"; 367 compatible = "ti,omap4-uart";
366 reg = <0x48066000 0x100>; 368 reg = <0x48066000 0x100>;
367 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 369 interrupts-extended = <&gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
368 ti,hwmods = "uart5"; 370 ti,hwmods = "uart5";
369 clock-frequency = <48000000>; 371 clock-frequency = <48000000>;
370 status = "disabled"; 372 status = "disabled";
@@ -373,7 +375,7 @@
373 uart6: serial@48068000 { 375 uart6: serial@48068000 {
374 compatible = "ti,omap4-uart"; 376 compatible = "ti,omap4-uart";
375 reg = <0x48068000 0x100>; 377 reg = <0x48068000 0x100>;
376 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 378 interrupts-extended = <&gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
377 ti,hwmods = "uart6"; 379 ti,hwmods = "uart6";
378 clock-frequency = <48000000>; 380 clock-frequency = <48000000>;
379 status = "disabled"; 381 status = "disabled";
@@ -382,7 +384,7 @@
382 uart7: serial@48420000 { 384 uart7: serial@48420000 {
383 compatible = "ti,omap4-uart"; 385 compatible = "ti,omap4-uart";
384 reg = <0x48420000 0x100>; 386 reg = <0x48420000 0x100>;
385 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>; 387 interrupts-extended = <&gic GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
386 ti,hwmods = "uart7"; 388 ti,hwmods = "uart7";
387 clock-frequency = <48000000>; 389 clock-frequency = <48000000>;
388 status = "disabled"; 390 status = "disabled";
@@ -391,7 +393,7 @@
391 uart8: serial@48422000 { 393 uart8: serial@48422000 {
392 compatible = "ti,omap4-uart"; 394 compatible = "ti,omap4-uart";
393 reg = <0x48422000 0x100>; 395 reg = <0x48422000 0x100>;
394 interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>; 396 interrupts-extended = <&gic GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
395 ti,hwmods = "uart8"; 397 ti,hwmods = "uart8";
396 clock-frequency = <48000000>; 398 clock-frequency = <48000000>;
397 status = "disabled"; 399 status = "disabled";
@@ -400,7 +402,7 @@
400 uart9: serial@48424000 { 402 uart9: serial@48424000 {
401 compatible = "ti,omap4-uart"; 403 compatible = "ti,omap4-uart";
402 reg = <0x48424000 0x100>; 404 reg = <0x48424000 0x100>;
403 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; 405 interrupts-extended = <&gic GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
404 ti,hwmods = "uart9"; 406 ti,hwmods = "uart9";
405 clock-frequency = <48000000>; 407 clock-frequency = <48000000>;
406 status = "disabled"; 408 status = "disabled";
@@ -409,7 +411,7 @@
409 uart10: serial@4ae2b000 { 411 uart10: serial@4ae2b000 {
410 compatible = "ti,omap4-uart"; 412 compatible = "ti,omap4-uart";
411 reg = <0x4ae2b000 0x100>; 413 reg = <0x4ae2b000 0x100>;
412 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 414 interrupts-extended = <&gic GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
413 ti,hwmods = "uart10"; 415 ti,hwmods = "uart10";
414 clock-frequency = <48000000>; 416 clock-frequency = <48000000>;
415 status = "disabled"; 417 status = "disabled";
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 1e6ff61a7f12..4bf3930a4a0e 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -187,18 +187,22 @@
187 }; 187 };
188 188
189 omap5_pmx_core: pinmux@4a002840 { 189 omap5_pmx_core: pinmux@4a002840 {
190 compatible = "ti,omap4-padconf", "pinctrl-single"; 190 compatible = "ti,omap5-padconf", "pinctrl-single";
191 reg = <0x4a002840 0x01b6>; 191 reg = <0x4a002840 0x01b6>;
192 #address-cells = <1>; 192 #address-cells = <1>;
193 #size-cells = <0>; 193 #size-cells = <0>;
194 #interrupt-cells = <1>;
195 interrupt-controller;
194 pinctrl-single,register-width = <16>; 196 pinctrl-single,register-width = <16>;
195 pinctrl-single,function-mask = <0x7fff>; 197 pinctrl-single,function-mask = <0x7fff>;
196 }; 198 };
197 omap5_pmx_wkup: pinmux@4ae0c840 { 199 omap5_pmx_wkup: pinmux@4ae0c840 {
198 compatible = "ti,omap4-padconf", "pinctrl-single"; 200 compatible = "ti,omap5-padconf", "pinctrl-single";
199 reg = <0x4ae0c840 0x0038>; 201 reg = <0x4ae0c840 0x0038>;
200 #address-cells = <1>; 202 #address-cells = <1>;
201 #size-cells = <0>; 203 #size-cells = <0>;
204 #interrupt-cells = <1>;
205 interrupt-controller;
202 pinctrl-single,register-width = <16>; 206 pinctrl-single,register-width = <16>;
203 pinctrl-single,function-mask = <0x7fff>; 207 pinctrl-single,function-mask = <0x7fff>;
204 }; 208 };
@@ -447,7 +451,7 @@
447 uart1: serial@4806a000 { 451 uart1: serial@4806a000 {
448 compatible = "ti,omap4-uart"; 452 compatible = "ti,omap4-uart";
449 reg = <0x4806a000 0x100>; 453 reg = <0x4806a000 0x100>;
450 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 454 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
451 ti,hwmods = "uart1"; 455 ti,hwmods = "uart1";
452 clock-frequency = <48000000>; 456 clock-frequency = <48000000>;
453 }; 457 };
@@ -455,7 +459,7 @@
455 uart2: serial@4806c000 { 459 uart2: serial@4806c000 {
456 compatible = "ti,omap4-uart"; 460 compatible = "ti,omap4-uart";
457 reg = <0x4806c000 0x100>; 461 reg = <0x4806c000 0x100>;
458 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 462 interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
459 ti,hwmods = "uart2"; 463 ti,hwmods = "uart2";
460 clock-frequency = <48000000>; 464 clock-frequency = <48000000>;
461 }; 465 };
@@ -463,7 +467,7 @@
463 uart3: serial@48020000 { 467 uart3: serial@48020000 {
464 compatible = "ti,omap4-uart"; 468 compatible = "ti,omap4-uart";
465 reg = <0x48020000 0x100>; 469 reg = <0x48020000 0x100>;
466 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 470 interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
467 ti,hwmods = "uart3"; 471 ti,hwmods = "uart3";
468 clock-frequency = <48000000>; 472 clock-frequency = <48000000>;
469 }; 473 };
@@ -471,7 +475,7 @@
471 uart4: serial@4806e000 { 475 uart4: serial@4806e000 {
472 compatible = "ti,omap4-uart"; 476 compatible = "ti,omap4-uart";
473 reg = <0x4806e000 0x100>; 477 reg = <0x4806e000 0x100>;
474 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 478 interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
475 ti,hwmods = "uart4"; 479 ti,hwmods = "uart4";
476 clock-frequency = <48000000>; 480 clock-frequency = <48000000>;
477 }; 481 };
@@ -479,7 +483,7 @@
479 uart5: serial@48066000 { 483 uart5: serial@48066000 {
480 compatible = "ti,omap4-uart"; 484 compatible = "ti,omap4-uart";
481 reg = <0x48066000 0x100>; 485 reg = <0x48066000 0x100>;
482 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 486 interrupts-extended = <&gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
483 ti,hwmods = "uart5"; 487 ti,hwmods = "uart5";
484 clock-frequency = <48000000>; 488 clock-frequency = <48000000>;
485 }; 489 };
@@ -487,7 +491,7 @@
487 uart6: serial@48068000 { 491 uart6: serial@48068000 {
488 compatible = "ti,omap4-uart"; 492 compatible = "ti,omap4-uart";
489 reg = <0x48068000 0x100>; 493 reg = <0x48068000 0x100>;
490 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 494 interrupts-extended = <&gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
491 ti,hwmods = "uart6"; 495 ti,hwmods = "uart6";
492 clock-frequency = <48000000>; 496 clock-frequency = <48000000>;
493 }; 497 };