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authorOlof Johansson <olof@lixom.net>2014-05-31 00:21:10 -0400
committerOlof Johansson <olof@lixom.net>2014-05-31 00:21:10 -0400
commit0f16aa3c24a216d14d7f0587e1cbd2c1b51a38f3 (patch)
treed42e6c228e730cac0e530c0266f29926a6a171a9 /arch/arm/boot
parentbb195016513513c78954678c22d30a4b2d4a6b1f (diff)
parent345e9bf08276395bd6620dfab56d1b679136d2ce (diff)
Merge tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung 3rd DT updates for v3.16" from Kukjin Kim: - add dts files support for new SoCs : exynos3250 SoC : exynos5260 SoC and exynos5260-xyref5260 board : exynos5410 SoC and exynos5410-smdk5410 board : exynos5800 SoC and exynos5800-peach-pi board - exynos4210-origen and exynos4412-origen : enable RTC and WDT nodes : use key code macros - exynos5250-arndale : use key code macros - exynos5420-arndale-octa : add secure firmware support - exynos5440 : update watchdog node name * tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/Makefile5
-rw-r--r--arch/arm/boot/dts/exynos3250-pinctrl.dtsi475
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi444
-rw-r--r--arch/arm/boot/dts/exynos4210-origen.dts19
-rw-r--r--arch/arm/boot/dts/exynos4412-origen.dts21
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts13
-rw-r--r--arch/arm/boot/dts/exynos5260-pinctrl.dtsi574
-rw-r--r--arch/arm/boot/dts/exynos5260-xyref5260.dts103
-rw-r--r--arch/arm/boot/dts/exynos5260.dtsi304
-rw-r--r--arch/arm/boot/dts/exynos5410-smdk5410.dts82
-rw-r--r--arch/arm/boot/dts/exynos5410.dtsi206
-rw-r--r--arch/arm/boot/dts/exynos5420-arndale-octa.dts5
-rw-r--r--arch/arm/boot/dts/exynos5420-peach-pit.dts4
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos5800-peach-pi.dts253
-rw-r--r--arch/arm/boot/dts/exynos5800.dtsi28
16 files changed, 2517 insertions, 21 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 33409a3895b5..cbe223c882d9 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -73,11 +73,14 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
73 exynos5250-arndale.dtb \ 73 exynos5250-arndale.dtb \
74 exynos5250-smdk5250.dtb \ 74 exynos5250-smdk5250.dtb \
75 exynos5250-snow.dtb \ 75 exynos5250-snow.dtb \
76 exynos5260-xyref5260.dtb \
77 exynos5410-smdk5410.dtb \
76 exynos5420-arndale-octa.dtb \ 78 exynos5420-arndale-octa.dtb \
77 exynos5420-peach-pit.dtb \ 79 exynos5420-peach-pit.dtb \
78 exynos5420-smdk5420.dtb \ 80 exynos5420-smdk5420.dtb \
79 exynos5440-sd5v1.dtb \ 81 exynos5440-sd5v1.dtb \
80 exynos5440-ssdk5440.dtb 82 exynos5440-ssdk5440.dtb \
83 exynos5800-peach-pi.dtb
81dtb-$(CONFIG_ARCH_HI3xxx) += hi3620-hi4511.dtb 84dtb-$(CONFIG_ARCH_HI3xxx) += hi3620-hi4511.dtb
82dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ 85dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
83 ecx-2000.dtb 86 ecx-2000.dtb
diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
new file mode 100644
index 000000000000..47b92c150f4e
--- /dev/null
+++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
@@ -0,0 +1,475 @@
1/*
2 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
3 *
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as device
8 * tree nodes are listed in this file.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15&pinctrl_0 {
16 gpa0: gpa0 {
17 gpio-controller;
18 #gpio-cells = <2>;
19
20 interrupt-controller;
21 #interrupt-cells = <2>;
22 };
23
24 gpa1: gpa1 {
25 gpio-controller;
26 #gpio-cells = <2>;
27
28 interrupt-controller;
29 #interrupt-cells = <2>;
30 };
31
32 gpb: gpb {
33 gpio-controller;
34 #gpio-cells = <2>;
35
36 interrupt-controller;
37 #interrupt-cells = <2>;
38 };
39
40 gpc0: gpc0 {
41 gpio-controller;
42 #gpio-cells = <2>;
43
44 interrupt-controller;
45 #interrupt-cells = <2>;
46 };
47
48 gpc1: gpc1 {
49 gpio-controller;
50 #gpio-cells = <2>;
51
52 interrupt-controller;
53 #interrupt-cells = <2>;
54 };
55
56 gpd0: gpd0 {
57 gpio-controller;
58 #gpio-cells = <2>;
59
60 interrupt-controller;
61 #interrupt-cells = <2>;
62 };
63
64 gpd1: gpd1 {
65 gpio-controller;
66 #gpio-cells = <2>;
67
68 interrupt-controller;
69 #interrupt-cells = <2>;
70 };
71
72 uart0_data: uart0-data {
73 samsung,pins = "gpa0-0", "gpa0-1";
74 samsung,pin-function = <0x2>;
75 samsung,pin-pud = <0>;
76 samsung,pin-drv = <0>;
77 };
78
79 uart0_fctl: uart0-fctl {
80 samsung,pins = "gpa0-2", "gpa0-3";
81 samsung,pin-function = <2>;
82 samsung,pin-pud = <0>;
83 samsung,pin-drv = <0>;
84 };
85
86 uart1_data: uart1-data {
87 samsung,pins = "gpa0-4", "gpa0-5";
88 samsung,pin-function = <2>;
89 samsung,pin-pud = <0>;
90 samsung,pin-drv = <0>;
91 };
92
93 uart1_fctl: uart1-fctl {
94 samsung,pins = "gpa0-6", "gpa0-7";
95 samsung,pin-function = <2>;
96 samsung,pin-pud = <0>;
97 samsung,pin-drv = <0>;
98 };
99
100 i2c2_bus: i2c2-bus {
101 samsung,pins = "gpa0-6", "gpa0-7";
102 samsung,pin-function = <3>;
103 samsung,pin-pud = <3>;
104 samsung,pin-drv = <0>;
105 };
106
107 i2c3_bus: i2c3-bus {
108 samsung,pins = "gpa1-2", "gpa1-3";
109 samsung,pin-function = <3>;
110 samsung,pin-pud = <3>;
111 samsung,pin-drv = <0>;
112 };
113
114 spi0_bus: spi0-bus {
115 samsung,pins = "gpb-0", "gpb-2", "gpb-3";
116 samsung,pin-function = <2>;
117 samsung,pin-pud = <3>;
118 samsung,pin-drv = <0>;
119 };
120
121 i2c4_bus: i2c4-bus {
122 samsung,pins = "gpb-0", "gpb-1";
123 samsung,pin-function = <3>;
124 samsung,pin-pud = <3>;
125 samsung,pin-drv = <0>;
126 };
127
128 spi1_bus: spi1-bus {
129 samsung,pins = "gpb-4", "gpb-6", "gpb-7";
130 samsung,pin-function = <2>;
131 samsung,pin-pud = <3>;
132 samsung,pin-drv = <0>;
133 };
134
135 i2c5_bus: i2c5-bus {
136 samsung,pins = "gpb-2", "gpb-3";
137 samsung,pin-function = <3>;
138 samsung,pin-pud = <3>;
139 samsung,pin-drv = <0>;
140 };
141
142 i2s2_bus: i2s2-bus {
143 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
144 "gpc1-4";
145 samsung,pin-function = <2>;
146 samsung,pin-pud = <0>;
147 samsung,pin-drv = <0>;
148 };
149
150 pcm2_bus: pcm2-bus {
151 samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
152 "gpc1-4";
153 samsung,pin-function = <3>;
154 samsung,pin-pud = <0>;
155 samsung,pin-drv = <0>;
156 };
157
158 i2c6_bus: i2c6-bus {
159 samsung,pins = "gpc1-3", "gpc1-4";
160 samsung,pin-function = <4>;
161 samsung,pin-pud = <3>;
162 samsung,pin-drv = <0>;
163 };
164
165 pwm0_out: pwm0-out {
166 samsung,pins = "gpd0-0";
167 samsung,pin-function = <2>;
168 samsung,pin-pud = <0>;
169 samsung,pin-drv = <0>;
170 };
171
172 pwm1_out: pwm1-out {
173 samsung,pins = "gpd0-1";
174 samsung,pin-function = <2>;
175 samsung,pin-pud = <0>;
176 samsung,pin-drv = <0>;
177 };
178
179 i2c7_bus: i2c7-bus {
180 samsung,pins = "gpd0-2", "gpd0-3";
181 samsung,pin-function = <3>;
182 samsung,pin-pud = <3>;
183 samsung,pin-drv = <0>;
184 };
185
186 pwm2_out: pwm2-out {
187 samsung,pins = "gpd0-2";
188 samsung,pin-function = <2>;
189 samsung,pin-pud = <0>;
190 samsung,pin-drv = <0>;
191 };
192
193 pwm3_out: pwm3-out {
194 samsung,pins = "gpd0-3";
195 samsung,pin-function = <2>;
196 samsung,pin-pud = <0>;
197 samsung,pin-drv = <0>;
198 };
199
200 i2c0_bus: i2c0-bus {
201 samsung,pins = "gpd1-0", "gpd1-1";
202 samsung,pin-function = <2>;
203 samsung,pin-pud = <3>;
204 samsung,pin-drv = <0>;
205 };
206
207 mipi0_clk: mipi0-clk {
208 samsung,pins = "gpd1-0", "gpd1-1";
209 samsung,pin-function = <3>;
210 samsung,pin-pud = <0>;
211 samsung,pin-drv = <0>;
212 };
213
214 i2c1_bus: i2c1-bus {
215 samsung,pins = "gpd1-2", "gpd1-3";
216 samsung,pin-function = <2>;
217 samsung,pin-pud = <3>;
218 samsung,pin-drv = <0>;
219 };
220};
221
222&pinctrl_1 {
223 gpe0: gpe0 {
224 gpio-controller;
225 #gpio-cells = <2>;
226 };
227
228 gpe1: gpe1 {
229 gpio-controller;
230 #gpio-cells = <2>;
231 };
232
233 gpe2: gpe2 {
234 gpio-controller;
235 #gpio-cells = <2>;
236 };
237
238 gpk0: gpk0 {
239 gpio-controller;
240 #gpio-cells = <2>;
241
242 interrupt-controller;
243 #interrupt-cells = <2>;
244 };
245
246 gpk1: gpk1 {
247 gpio-controller;
248 #gpio-cells = <2>;
249
250 interrupt-controller;
251 #interrupt-cells = <2>;
252 };
253
254 gpk2: gpk2 {
255 gpio-controller;
256 #gpio-cells = <2>;
257
258 interrupt-controller;
259 #interrupt-cells = <2>;
260 };
261
262 gpl0: gpl0 {
263 gpio-controller;
264 #gpio-cells = <2>;
265
266 interrupt-controller;
267 #interrupt-cells = <2>;
268 };
269
270 gpm0: gpm0 {
271 gpio-controller;
272 #gpio-cells = <2>;
273
274 interrupt-controller;
275 #interrupt-cells = <2>;
276 };
277
278 gpm1: gpm1 {
279 gpio-controller;
280 #gpio-cells = <2>;
281
282 interrupt-controller;
283 #interrupt-cells = <2>;
284 };
285
286 gpm2: gpm2 {
287 gpio-controller;
288 #gpio-cells = <2>;
289
290 interrupt-controller;
291 #interrupt-cells = <2>;
292 };
293
294 gpm3: gpm3 {
295 gpio-controller;
296 #gpio-cells = <2>;
297
298 interrupt-controller;
299 #interrupt-cells = <2>;
300 };
301
302 gpm4: gpm4 {
303 gpio-controller;
304 #gpio-cells = <2>;
305
306 interrupt-controller;
307 #interrupt-cells = <2>;
308 };
309
310 gpx0: gpx0 {
311 gpio-controller;
312 #gpio-cells = <2>;
313
314 interrupt-controller;
315 interrupt-parent = <&gic>;
316 interrupts = <0 32 0>, <0 33 0>, <0 34 0>, <0 35 0>,
317 <0 36 0>, <0 37 0>, <0 38 0>, <0 39 0>;
318 #interrupt-cells = <2>;
319 };
320
321 gpx1: gpx1 {
322 gpio-controller;
323 #gpio-cells = <2>;
324
325 interrupt-controller;
326 interrupt-parent = <&gic>;
327 interrupts = <0 40 0>, <0 41 0>, <0 42 0>, <0 43 0>,
328 <0 44 0>, <0 45 0>, <0 46 0>, <0 47 0>;
329 #interrupt-cells = <2>;
330 };
331
332 gpx2: gpx2 {
333 gpio-controller;
334 #gpio-cells = <2>;
335
336 interrupt-controller;
337 #interrupt-cells = <2>;
338 };
339
340 gpx3: gpx3 {
341 gpio-controller;
342 #gpio-cells = <2>;
343
344 interrupt-controller;
345 #interrupt-cells = <2>;
346 };
347
348 sd0_clk: sd0-clk {
349 samsung,pins = "gpk0-0";
350 samsung,pin-function = <2>;
351 samsung,pin-pud = <0>;
352 samsung,pin-drv = <3>;
353 };
354
355 sd0_cmd: sd0-cmd {
356 samsung,pins = "gpk0-1";
357 samsung,pin-function = <2>;
358 samsung,pin-pud = <0>;
359 samsung,pin-drv = <3>;
360 };
361
362 sd0_cd: sd0-cd {
363 samsung,pins = "gpk0-2";
364 samsung,pin-function = <2>;
365 samsung,pin-pud = <3>;
366 samsung,pin-drv = <3>;
367 };
368
369 sd0_rdqs: sd0-rdqs {
370 samsung,pins = "gpk0-7";
371 samsung,pin-function = <2>;
372 samsung,pin-pud = <0>;
373 samsung,pin-drv = <3>;
374 };
375
376 sd0_bus1: sd0-bus-width1 {
377 samsung,pins = "gpk0-3";
378 samsung,pin-function = <2>;
379 samsung,pin-pud = <3>;
380 samsung,pin-drv = <3>;
381 };
382
383 sd0_bus4: sd0-bus-width4 {
384 samsung,pins = "gpk0-4", "gpk0-5", "gpk0-6";
385 samsung,pin-function = <2>;
386 samsung,pin-pud = <3>;
387 samsung,pin-drv = <3>;
388 };
389
390 sd0_bus8: sd0-bus-width8 {
391 samsung,pins = "gpl0-0", "gpl0-1", "gpl0-2", "gpl0-3";
392 samsung,pin-function = <2>;
393 samsung,pin-pud = <3>;
394 samsung,pin-drv = <3>;
395 };
396
397 sd1_clk: sd1-clk {
398 samsung,pins = "gpk1-0";
399 samsung,pin-function = <2>;
400 samsung,pin-pud = <0>;
401 samsung,pin-drv = <3>;
402 };
403
404 sd1_cmd: sd1-cmd {
405 samsung,pins = "gpk1-1";
406 samsung,pin-function = <2>;
407 samsung,pin-pud = <0>;
408 samsung,pin-drv = <3>;
409 };
410
411 sd1_cd: sd1-cd {
412 samsung,pins = "gpk1-2";
413 samsung,pin-function = <2>;
414 samsung,pin-pud = <3>;
415 samsung,pin-drv = <3>;
416 };
417
418 sd1_bus1: sd1-bus-width1 {
419 samsung,pins = "gpk1-3";
420 samsung,pin-function = <2>;
421 samsung,pin-pud = <3>;
422 samsung,pin-drv = <3>;
423 };
424
425 sd1_bus4: sd1-bus-width4 {
426 samsung,pins = "gpk1-4", "gpk1-5", "gpk1-6";
427 samsung,pin-function = <2>;
428 samsung,pin-pud = <3>;
429 samsung,pin-drv = <3>;
430 };
431
432 cam_port_b_io: cam-port-b-io {
433 samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
434 "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
435 "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
436 samsung,pin-function = <3>;
437 samsung,pin-pud = <3>;
438 samsung,pin-drv = <0>;
439 };
440
441 cam_port_b_clk_active: cam-port-b-clk-active {
442 samsung,pins = "gpm2-2";
443 samsung,pin-function = <3>;
444 samsung,pin-pud = <0>;
445 samsung,pin-drv = <3>;
446 };
447
448 cam_port_b_clk_idle: cam-port-b-clk-idle {
449 samsung,pins = "gpm2-2";
450 samsung,pin-function = <0>;
451 samsung,pin-pud = <0>;
452 samsung,pin-drv = <0>;
453 };
454
455 fimc_is_i2c0: fimc-is-i2c0 {
456 samsung,pins = "gpm4-0", "gpm4-1";
457 samsung,pin-function = <2>;
458 samsung,pin-pud = <0>;
459 samsung,pin-drv = <0>;
460 };
461
462 fimc_is_i2c1: fimc-is-i2c1 {
463 samsung,pins = "gpm4-2", "gpm4-3";
464 samsung,pin-function = <2>;
465 samsung,pin-pud = <0>;
466 samsung,pin-drv = <0>;
467 };
468
469 fimc_is_uart: fimc-is-uart {
470 samsung,pins = "gpm3-5", "gpm3-7";
471 samsung,pin-function = <3>;
472 samsung,pin-pud = <0>;
473 samsung,pin-drv = <0>;
474 };
475};
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
new file mode 100644
index 000000000000..3e678fa335bf
--- /dev/null
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -0,0 +1,444 @@
1/*
2 * Samsung's Exynos3250 SoC device tree source
3 *
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos3250 SoC device nodes are listed in this file. Exynos3250
8 * based board files can include this file and provide values for board specfic
9 * bindings.
10 *
11 * Note: This file does not include device nodes for all the controllers in
12 * Exynos3250 SoC. As device tree coverage for Exynos3250 increases, additional
13 * nodes can be added to this file.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
19
20#include "skeleton.dtsi"
21#include <dt-bindings/clock/exynos3250.h>
22
23/ {
24 compatible = "samsung,exynos3250";
25 interrupt-parent = <&gic>;
26
27 aliases {
28 pinctrl0 = &pinctrl_0;
29 pinctrl1 = &pinctrl_1;
30 mshc0 = &mshc_0;
31 mshc1 = &mshc_1;
32 spi0 = &spi_0;
33 spi1 = &spi_1;
34 i2c0 = &i2c_0;
35 i2c1 = &i2c_1;
36 i2c2 = &i2c_2;
37 i2c3 = &i2c_3;
38 i2c4 = &i2c_4;
39 i2c5 = &i2c_5;
40 i2c6 = &i2c_6;
41 i2c7 = &i2c_7;
42 };
43
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
47
48 cpu0: cpu@0 {
49 device_type = "cpu";
50 compatible = "arm,cortex-a7";
51 reg = <0>;
52 clock-frequency = <1000000000>;
53 };
54
55 cpu1: cpu@1 {
56 device_type = "cpu";
57 compatible = "arm,cortex-a7";
58 reg = <1>;
59 clock-frequency = <1000000000>;
60 };
61 };
62
63 soc: soc {
64 compatible = "simple-bus";
65 #address-cells = <1>;
66 #size-cells = <1>;
67 ranges;
68
69 fixed-rate-clocks {
70 #address-cells = <1>;
71 #size-cells = <0>;
72
73 xusbxti: clock@0 {
74 compatible = "fixed-clock";
75 #address-cells = <1>;
76 #size-cells = <0>;
77 reg = <0>;
78 clock-frequency = <0>;
79 #clock-cells = <0>;
80 clock-output-names = "xusbxti";
81 };
82
83 xxti: clock@1 {
84 compatible = "fixed-clock";
85 reg = <1>;
86 clock-frequency = <0>;
87 #clock-cells = <0>;
88 clock-output-names = "xxti";
89 };
90
91 xtcxo: clock@2 {
92 compatible = "fixed-clock";
93 reg = <2>;
94 clock-frequency = <0>;
95 #clock-cells = <0>;
96 clock-output-names = "xtcxo";
97 };
98 };
99
100 sysram@02020000 {
101 compatible = "mmio-sram";
102 reg = <0x02020000 0x40000>;
103 #address-cells = <1>;
104 #size-cells = <1>;
105 ranges = <0 0x02020000 0x40000>;
106
107 smp-sysram@0 {
108 compatible = "samsung,exynos4210-sysram";
109 reg = <0x0 0x1000>;
110 };
111
112 smp-sysram@3f000 {
113 compatible = "samsung,exynos4210-sysram-ns";
114 reg = <0x3f000 0x1000>;
115 };
116 };
117
118 chipid@10000000 {
119 compatible = "samsung,exynos4210-chipid";
120 reg = <0x10000000 0x100>;
121 };
122
123 sys_reg: syscon@10010000 {
124 compatible = "samsung,exynos3-sysreg", "syscon";
125 reg = <0x10010000 0x400>;
126 };
127
128 pmu_system_controller: system-controller@10020000 {
129 compatible = "samsung,exynos3250-pmu", "syscon";
130 reg = <0x10020000 0x4000>;
131 };
132
133 pd_cam: cam-power-domain@10023C00 {
134 compatible = "samsung,exynos4210-pd";
135 reg = <0x10023C00 0x20>;
136 };
137
138 pd_mfc: mfc-power-domain@10023C40 {
139 compatible = "samsung,exynos4210-pd";
140 reg = <0x10023C40 0x20>;
141 };
142
143 pd_g3d: g3d-power-domain@10023C60 {
144 compatible = "samsung,exynos4210-pd";
145 reg = <0x10023C60 0x20>;
146 };
147
148 pd_lcd0: lcd0-power-domain@10023C80 {
149 compatible = "samsung,exynos4210-pd";
150 reg = <0x10023C80 0x20>;
151 };
152
153 pd_isp: isp-power-domain@10023CA0 {
154 compatible = "samsung,exynos4210-pd";
155 reg = <0x10023CA0 0x20>;
156 };
157
158 cmu: clock-controller@10030000 {
159 compatible = "samsung,exynos3250-cmu";
160 reg = <0x10030000 0x20000>;
161 #clock-cells = <1>;
162 };
163
164 rtc: rtc@10070000 {
165 compatible = "samsung,s3c6410-rtc";
166 reg = <0x10070000 0x100>;
167 interrupts = <0 73 0>, <0 74 0>;
168 status = "disabled";
169 };
170
171 gic: interrupt-controller@10481000 {
172 compatible = "arm,cortex-a15-gic";
173 #interrupt-cells = <3>;
174 interrupt-controller;
175 reg = <0x10481000 0x1000>,
176 <0x10482000 0x1000>,
177 <0x10484000 0x2000>,
178 <0x10486000 0x2000>;
179 interrupts = <1 9 0xf04>;
180 };
181
182 mct@10050000 {
183 compatible = "samsung,exynos4210-mct";
184 reg = <0x10050000 0x800>;
185 interrupts = <0 218 0>, <0 219 0>, <0 220 0>, <0 221 0>,
186 <0 223 0>, <0 226 0>, <0 227 0>, <0 228 0>;
187 clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
188 clock-names = "fin_pll", "mct";
189 };
190
191 pinctrl_1: pinctrl@11000000 {
192 compatible = "samsung,exynos3250-pinctrl";
193 reg = <0x11000000 0x1000>;
194 interrupts = <0 225 0>;
195
196 wakeup-interrupt-controller {
197 compatible = "samsung,exynos4210-wakeup-eint";
198 interrupt-parent = <&gic>;
199 interrupts = <0 48 0>;
200 };
201 };
202
203 pinctrl_0: pinctrl@11400000 {
204 compatible = "samsung,exynos3250-pinctrl";
205 reg = <0x11400000 0x1000>;
206 interrupts = <0 240 0>;
207 };
208
209 mshc_0: mshc@12510000 {
210 compatible = "samsung,exynos5250-dw-mshc";
211 reg = <0x12510000 0x1000>;
212 interrupts = <0 142 0>;
213 clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
214 clock-names = "biu", "ciu";
215 fifo-depth = <0x80>;
216 #address-cells = <1>;
217 #size-cells = <0>;
218 status = "disabled";
219 };
220
221 mshc_1: mshc@12520000 {
222 compatible = "samsung,exynos5250-dw-mshc";
223 reg = <0x12520000 0x1000>;
224 interrupts = <0 143 0>;
225 clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
226 clock-names = "biu", "ciu";
227 fifo-depth = <0x80>;
228 #address-cells = <1>;
229 #size-cells = <0>;
230 status = "disabled";
231 };
232
233 amba {
234 compatible = "arm,amba-bus";
235 #address-cells = <1>;
236 #size-cells = <1>;
237 interrupt-parent = <&gic>;
238 ranges;
239
240 pdma0: pdma@12680000 {
241 compatible = "arm,pl330", "arm,primecell";
242 reg = <0x12680000 0x1000>;
243 interrupts = <0 138 0>;
244 clocks = <&cmu CLK_PDMA0>;
245 clock-names = "apb_pclk";
246 #dma-cells = <1>;
247 #dma-channels = <8>;
248 #dma-requests = <32>;
249 };
250
251 pdma1: pdma@12690000 {
252 compatible = "arm,pl330", "arm,primecell";
253 reg = <0x12690000 0x1000>;
254 interrupts = <0 139 0>;
255 clocks = <&cmu CLK_PDMA1>;
256 clock-names = "apb_pclk";
257 #dma-cells = <1>;
258 #dma-channels = <8>;
259 #dma-requests = <32>;
260 };
261 };
262
263 adc: adc@126C0000 {
264 compatible = "samsung,exynos-adc-v3";
265 reg = <0x126C0000 0x100>, <0x10020718 0x4>;
266 interrupts = <0 137 0>;
267 clock-names = "adc", "sclk_tsadc";
268 clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
269 #io-channel-cells = <1>;
270 io-channel-ranges;
271 status = "disabled";
272 };
273
274 serial_0: serial@13800000 {
275 compatible = "samsung,exynos4210-uart";
276 reg = <0x13800000 0x100>;
277 interrupts = <0 109 0>;
278 clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
279 clock-names = "uart", "clk_uart_baud0";
280 status = "disabled";
281 };
282
283 serial_1: serial@13810000 {
284 compatible = "samsung,exynos4210-uart";
285 reg = <0x13810000 0x100>;
286 interrupts = <0 110 0>;
287 clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>;
288 clock-names = "uart", "clk_uart_baud0";
289 status = "disabled";
290 };
291
292 i2c_0: i2c@13860000 {
293 #address-cells = <1>;
294 #size-cells = <0>;
295 compatible = "samsung,s3c2440-i2c";
296 reg = <0x13860000 0x100>;
297 interrupts = <0 113 0>;
298 clocks = <&cmu CLK_I2C0>;
299 clock-names = "i2c";
300 pinctrl-names = "default";
301 pinctrl-0 = <&i2c0_bus>;
302 status = "disabled";
303 };
304
305 i2c_1: i2c@13870000 {
306 #address-cells = <1>;
307 #size-cells = <0>;
308 compatible = "samsung,s3c2440-i2c";
309 reg = <0x13870000 0x100>;
310 interrupts = <0 114 0>;
311 clocks = <&cmu CLK_I2C1>;
312 clock-names = "i2c";
313 pinctrl-names = "default";
314 pinctrl-0 = <&i2c1_bus>;
315 status = "disabled";
316 };
317
318 i2c_2: i2c@13880000 {
319 #address-cells = <1>;
320 #size-cells = <0>;
321 compatible = "samsung,s3c2440-i2c";
322 reg = <0x13880000 0x100>;
323 interrupts = <0 115 0>;
324 clocks = <&cmu CLK_I2C2>;
325 clock-names = "i2c";
326 pinctrl-names = "default";
327 pinctrl-0 = <&i2c2_bus>;
328 status = "disabled";
329 };
330
331 i2c_3: i2c@13890000 {
332 #address-cells = <1>;
333 #size-cells = <0>;
334 compatible = "samsung,s3c2440-i2c";
335 reg = <0x13890000 0x100>;
336 interrupts = <0 116 0>;
337 clocks = <&cmu CLK_I2C3>;
338 clock-names = "i2c";
339 pinctrl-names = "default";
340 pinctrl-0 = <&i2c3_bus>;
341 status = "disabled";
342 };
343
344 i2c_4: i2c@138A0000 {
345 #address-cells = <1>;
346 #size-cells = <0>;
347 compatible = "samsung,s3c2440-i2c";
348 reg = <0x138A0000 0x100>;
349 interrupts = <0 117 0>;
350 clocks = <&cmu CLK_I2C4>;
351 clock-names = "i2c";
352 pinctrl-names = "default";
353 pinctrl-0 = <&i2c4_bus>;
354 status = "disabled";
355 };
356
357 i2c_5: i2c@138B0000 {
358 #address-cells = <1>;
359 #size-cells = <0>;
360 compatible = "samsung,s3c2440-i2c";
361 reg = <0x138B0000 0x100>;
362 interrupts = <0 118 0>;
363 clocks = <&cmu CLK_I2C5>;
364 clock-names = "i2c";
365 pinctrl-names = "default";
366 pinctrl-0 = <&i2c5_bus>;
367 status = "disabled";
368 };
369
370 i2c_6: i2c@138C0000 {
371 #address-cells = <1>;
372 #size-cells = <0>;
373 compatible = "samsung,s3c2440-i2c";
374 reg = <0x138C0000 0x100>;
375 interrupts = <0 119 0>;
376 clocks = <&cmu CLK_I2C6>;
377 clock-names = "i2c";
378 pinctrl-names = "default";
379 pinctrl-0 = <&i2c6_bus>;
380 status = "disabled";
381 };
382
383 i2c_7: i2c@138D0000 {
384 #address-cells = <1>;
385 #size-cells = <0>;
386 compatible = "samsung,s3c2440-i2c";
387 reg = <0x138D0000 0x100>;
388 interrupts = <0 120 0>;
389 clocks = <&cmu CLK_I2C7>;
390 clock-names = "i2c";
391 pinctrl-names = "default";
392 pinctrl-0 = <&i2c7_bus>;
393 status = "disabled";
394 };
395
396 spi_0: spi@13920000 {
397 compatible = "samsung,exynos4210-spi";
398 reg = <0x13920000 0x100>;
399 interrupts = <0 121 0>;
400 dmas = <&pdma0 7>, <&pdma0 6>;
401 dma-names = "tx", "rx";
402 #address-cells = <1>;
403 #size-cells = <0>;
404 clocks = <&cmu CLK_SPI0>, <&cmu CLK_SCLK_SPI0>;
405 clock-names = "spi", "spi_busclk0";
406 samsung,spi-src-clk = <0>;
407 pinctrl-names = "default";
408 pinctrl-0 = <&spi0_bus>;
409 status = "disabled";
410 };
411
412 spi_1: spi@13930000 {
413 compatible = "samsung,exynos4210-spi";
414 reg = <0x13930000 0x100>;
415 interrupts = <0 122 0>;
416 dmas = <&pdma1 7>, <&pdma1 6>;
417 dma-names = "tx", "rx";
418 #address-cells = <1>;
419 #size-cells = <0>;
420 clocks = <&cmu CLK_SPI1>, <&cmu CLK_SCLK_SPI1>;
421 clock-names = "spi", "spi_busclk0";
422 samsung,spi-src-clk = <0>;
423 pinctrl-names = "default";
424 pinctrl-0 = <&spi1_bus>;
425 status = "disabled";
426 };
427
428 pwm: pwm@139D0000 {
429 compatible = "samsung,exynos4210-pwm";
430 reg = <0x139D0000 0x1000>;
431 interrupts = <0 104 0>, <0 105 0>, <0 106 0>,
432 <0 107 0>, <0 108 0>;
433 #pwm-cells = <3>;
434 status = "disabled";
435 };
436
437 pmu {
438 compatible = "arm,cortex-a7-pmu";
439 interrupts = <0 18 0>, <0 19 0>;
440 };
441 };
442};
443
444#include "exynos3250-pinctrl.dtsi"
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index 72fb11f7ea21..f767c425d0b5 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -16,6 +16,7 @@
16 16
17/dts-v1/; 17/dts-v1/;
18#include "exynos4210.dtsi" 18#include "exynos4210.dtsi"
19#include <dt-bindings/input/input.h>
19 20
20/ { 21/ {
21 model = "Insignal Origen evaluation board based on Exynos4210"; 22 model = "Insignal Origen evaluation board based on Exynos4210";
@@ -48,6 +49,14 @@
48 }; 49 };
49 }; 50 };
50 51
52 watchdog@10060000 {
53 status = "okay";
54 };
55
56 rtc@10070000 {
57 status = "okay";
58 };
59
51 tmu@100C0000 { 60 tmu@100C0000 {
52 status = "okay"; 61 status = "okay";
53 }; 62 };
@@ -251,35 +260,35 @@
251 up { 260 up {
252 label = "Up"; 261 label = "Up";
253 gpios = <&gpx2 0 1>; 262 gpios = <&gpx2 0 1>;
254 linux,code = <103>; 263 linux,code = <KEY_UP>;
255 gpio-key,wakeup; 264 gpio-key,wakeup;
256 }; 265 };
257 266
258 down { 267 down {
259 label = "Down"; 268 label = "Down";
260 gpios = <&gpx2 1 1>; 269 gpios = <&gpx2 1 1>;
261 linux,code = <108>; 270 linux,code = <KEY_DOWN>;
262 gpio-key,wakeup; 271 gpio-key,wakeup;
263 }; 272 };
264 273
265 back { 274 back {
266 label = "Back"; 275 label = "Back";
267 gpios = <&gpx1 7 1>; 276 gpios = <&gpx1 7 1>;
268 linux,code = <158>; 277 linux,code = <KEY_BACK>;
269 gpio-key,wakeup; 278 gpio-key,wakeup;
270 }; 279 };
271 280
272 home { 281 home {
273 label = "Home"; 282 label = "Home";
274 gpios = <&gpx1 6 1>; 283 gpios = <&gpx1 6 1>;
275 linux,code = <102>; 284 linux,code = <KEY_HOME>;
276 gpio-key,wakeup; 285 gpio-key,wakeup;
277 }; 286 };
278 287
279 menu { 288 menu {
280 label = "Menu"; 289 label = "Menu";
281 gpios = <&gpx1 5 1>; 290 gpios = <&gpx1 5 1>;
282 linux,code = <139>; 291 linux,code = <KEY_MENU>;
283 gpio-key,wakeup; 292 gpio-key,wakeup;
284 }; 293 };
285 }; 294 };
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index e2c0dcab4d81..e925c9fbfb07 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -14,6 +14,7 @@
14 14
15/dts-v1/; 15/dts-v1/;
16#include "exynos4412.dtsi" 16#include "exynos4412.dtsi"
17#include <dt-bindings/input/input.h>
17 18
18/ { 19/ {
19 model = "Insignal Origen evaluation board based on Exynos4412"; 20 model = "Insignal Origen evaluation board based on Exynos4412";
@@ -48,6 +49,14 @@
48 }; 49 };
49 }; 50 };
50 51
52 watchdog@10060000 {
53 status = "okay";
54 };
55
56 rtc@10070000 {
57 status = "okay";
58 };
59
51 pinctrl@11000000 { 60 pinctrl@11000000 {
52 keypad_rows: keypad-rows { 61 keypad_rows: keypad-rows {
53 samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2"; 62 samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2";
@@ -76,37 +85,37 @@
76 key_home { 85 key_home {
77 keypad,row = <0>; 86 keypad,row = <0>;
78 keypad,column = <0>; 87 keypad,column = <0>;
79 linux,code = <102>; 88 linux,code = <KEY_HOME>;
80 }; 89 };
81 90
82 key_down { 91 key_down {
83 keypad,row = <0>; 92 keypad,row = <0>;
84 keypad,column = <1>; 93 keypad,column = <1>;
85 linux,code = <108>; 94 linux,code = <KEY_DOWN>;
86 }; 95 };
87 96
88 key_up { 97 key_up {
89 keypad,row = <1>; 98 keypad,row = <1>;
90 keypad,column = <0>; 99 keypad,column = <0>;
91 linux,code = <103>; 100 linux,code = <KEY_UP>;
92 }; 101 };
93 102
94 key_menu { 103 key_menu {
95 keypad,row = <1>; 104 keypad,row = <1>;
96 keypad,column = <1>; 105 keypad,column = <1>;
97 linux,code = <139>; 106 linux,code = <KEY_MENU>;
98 }; 107 };
99 108
100 key_back { 109 key_back {
101 keypad,row = <2>; 110 keypad,row = <2>;
102 keypad,column = <0>; 111 keypad,column = <0>;
103 linux,code = <158>; 112 linux,code = <KEY_BACK>;
104 }; 113 };
105 114
106 key_enter { 115 key_enter {
107 keypad,row = <2>; 116 keypad,row = <2>;
108 keypad,column = <1>; 117 keypad,column = <1>;
109 linux,code = <28>; 118 linux,code = <KEY_ENTER>;
110 }; 119 };
111 }; 120 };
112 121
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 090f9830b129..1f5afb39355f 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -12,6 +12,7 @@
12/dts-v1/; 12/dts-v1/;
13#include "exynos5250.dtsi" 13#include "exynos5250.dtsi"
14#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/input/input.h>
15 16
16/ { 17/ {
17 model = "Insignal Arndale evaluation board based on EXYNOS5250"; 18 model = "Insignal Arndale evaluation board based on EXYNOS5250";
@@ -444,42 +445,42 @@
444 menu { 445 menu {
445 label = "SW-TACT2"; 446 label = "SW-TACT2";
446 gpios = <&gpx1 4 1>; 447 gpios = <&gpx1 4 1>;
447 linux,code = <139>; 448 linux,code = <KEY_MENU>;
448 gpio-key,wakeup; 449 gpio-key,wakeup;
449 }; 450 };
450 451
451 home { 452 home {
452 label = "SW-TACT3"; 453 label = "SW-TACT3";
453 gpios = <&gpx1 5 1>; 454 gpios = <&gpx1 5 1>;
454 linux,code = <102>; 455 linux,code = <KEY_HOME>;
455 gpio-key,wakeup; 456 gpio-key,wakeup;
456 }; 457 };
457 458
458 up { 459 up {
459 label = "SW-TACT4"; 460 label = "SW-TACT4";
460 gpios = <&gpx1 6 1>; 461 gpios = <&gpx1 6 1>;
461 linux,code = <103>; 462 linux,code = <KEY_UP>;
462 gpio-key,wakeup; 463 gpio-key,wakeup;
463 }; 464 };
464 465
465 down { 466 down {
466 label = "SW-TACT5"; 467 label = "SW-TACT5";
467 gpios = <&gpx1 7 1>; 468 gpios = <&gpx1 7 1>;
468 linux,code = <108>; 469 linux,code = <KEY_DOWN>;
469 gpio-key,wakeup; 470 gpio-key,wakeup;
470 }; 471 };
471 472
472 back { 473 back {
473 label = "SW-TACT6"; 474 label = "SW-TACT6";
474 gpios = <&gpx2 0 1>; 475 gpios = <&gpx2 0 1>;
475 linux,code = <158>; 476 linux,code = <KEY_BACK>;
476 gpio-key,wakeup; 477 gpio-key,wakeup;
477 }; 478 };
478 479
479 wakeup { 480 wakeup {
480 label = "SW-TACT7"; 481 label = "SW-TACT7";
481 gpios = <&gpx2 1 1>; 482 gpios = <&gpx2 1 1>;
482 linux,code = <143>; 483 linux,code = <KEY_WAKEUP>;
483 gpio-key,wakeup; 484 gpio-key,wakeup;
484 }; 485 };
485 }; 486 };
diff --git a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi
new file mode 100644
index 000000000000..f6ee55ea0708
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi
@@ -0,0 +1,574 @@
1/*
2 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
8 * tree nodes are listed in this file.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#define PIN_PULL_NONE 0
16#define PIN_PULL_DOWN 1
17#define PIN_PULL_UP 3
18
19&pinctrl_0 {
20 gpa0: gpa0 {
21 gpio-controller;
22 #gpio-cells = <2>;
23
24 interrupt-controller;
25 #interrupt-cells = <2>;
26 };
27
28 gpa1: gpa1 {
29 gpio-controller;
30 #gpio-cells = <2>;
31
32 interrupt-controller;
33 #interrupt-cells = <2>;
34 };
35
36 gpa2: gpa2 {
37 gpio-controller;
38 #gpio-cells = <2>;
39
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 };
43
44 gpb0: gpb0 {
45 gpio-controller;
46 #gpio-cells = <2>;
47
48 interrupt-controller;
49 #interrupt-cells = <2>;
50 };
51
52 gpb1: gpb1 {
53 gpio-controller;
54 #gpio-cells = <2>;
55
56 interrupt-controller;
57 #interrupt-cells = <2>;
58 };
59
60 gpb2: gpb2 {
61 gpio-controller;
62 #gpio-cells = <2>;
63
64 interrupt-controller;
65 #interrupt-cells = <2>;
66 };
67
68 gpb3: gpb3 {
69 gpio-controller;
70 #gpio-cells = <2>;
71
72 interrupt-controller;
73 #interrupt-cells = <2>;
74 };
75
76 gpb4: gpb4 {
77 gpio-controller;
78 #gpio-cells = <2>;
79
80 interrupt-controller;
81 #interrupt-cells = <2>;
82 };
83
84 gpb5: gpb5 {
85 gpio-controller;
86 #gpio-cells = <2>;
87
88 interrupt-controller;
89 #interrupt-cells = <2>;
90 };
91
92 gpd0: gpd0 {
93 gpio-controller;
94 #gpio-cells = <2>;
95
96 interrupt-controller;
97 #interrupt-cells = <2>;
98 };
99
100 gpd1: gpd1 {
101 gpio-controller;
102 #gpio-cells = <2>;
103
104 interrupt-controller;
105 #interrupt-cells = <2>;
106 };
107
108 gpd2: gpd2 {
109 gpio-controller;
110 #gpio-cells = <2>;
111
112 interrupt-controller;
113 #interrupt-cells = <2>;
114 };
115
116 gpe0: gpe0 {
117 gpio-controller;
118 #gpio-cells = <2>;
119
120 interrupt-controller;
121 #interrupt-cells = <2>;
122 };
123
124 gpe1: gpe1 {
125 gpio-controller;
126 #gpio-cells = <2>;
127
128 interrupt-controller;
129 #interrupt-cells = <2>;
130 };
131
132 gpf0: gpf0 {
133 gpio-controller;
134 #gpio-cells = <2>;
135
136 interrupt-controller;
137 #interrupt-cells = <2>;
138 };
139
140 gpf1: gpf1 {
141 gpio-controller;
142 #gpio-cells = <2>;
143
144 interrupt-controller;
145 #interrupt-cells = <2>;
146 };
147
148 gpk0: gpk0 {
149 gpio-controller;
150 #gpio-cells = <2>;
151
152 interrupt-controller;
153 #interrupt-cells = <2>;
154 };
155
156 gpx0: gpx0 {
157 gpio-controller;
158 #gpio-cells = <2>;
159
160 interrupt-controller;
161 #interrupt-cells = <2>;
162 };
163
164 gpx1: gpx1 {
165 gpio-controller;
166 #gpio-cells = <2>;
167
168 interrupt-controller;
169 #interrupt-cells = <2>;
170 };
171
172 gpx2: gpx2 {
173 gpio-controller;
174 #gpio-cells = <2>;
175
176 interrupt-controller;
177 #interrupt-cells = <2>;
178 };
179
180 gpx3: gpx3 {
181 gpio-controller;
182 #gpio-cells = <2>;
183
184 interrupt-controller;
185 #interrupt-cells = <2>;
186 };
187
188 uart0_data: uart0-data {
189 samsung,pins = "gpa0-0", "gpa0-1";
190 samsung,pin-function = <2>;
191 samsung,pin-pud = <PIN_PULL_NONE>;
192 samsung,pin-drv = <0>;
193 };
194
195 uart0_fctl: uart0-fctl {
196 samsung,pins = "gpa0-2", "gpa0-3";
197 samsung,pin-function = <2>;
198 samsung,pin-pud = <PIN_PULL_NONE>;
199 samsung,pin-drv = <0>;
200 };
201
202 uart1_data: uart1-data {
203 samsung,pins = "gpa1-0", "gpa1-1";
204 samsung,pin-function = <2>;
205 samsung,pin-pud = <PIN_PULL_NONE>;
206 samsung,pin-drv = <0>;
207 };
208
209 uart1_fctl: uart1-fctl {
210 samsung,pins = "gpa1-2", "gpa1-3";
211 samsung,pin-function = <2>;
212 samsung,pin-pud = <PIN_PULL_NONE>;
213 samsung,pin-drv = <0>;
214 };
215
216 uart2_data: uart2-data {
217 samsung,pins = "gpa1-4", "gpa1-5";
218 samsung,pin-function = <2>;
219 samsung,pin-pud = <PIN_PULL_NONE>;
220 samsung,pin-drv = <0>;
221 };
222
223 spi0_bus: spi0-bus {
224 samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3";
225 samsung,pin-function = <2>;
226 samsung,pin-pud = <PIN_PULL_UP>;
227 samsung,pin-drv = <0>;
228 };
229
230 spi1_bus: spi1-bus {
231 samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7";
232 samsung,pin-function = <2>;
233 samsung,pin-pud = <PIN_PULL_UP>;
234 samsung,pin-drv = <0>;
235 };
236
237 usb3_vbus0_en: usb3-vbus0-en {
238 samsung,pins = "gpa2-4";
239 samsung,pin-function = <1>;
240 samsung,pin-pud = <PIN_PULL_NONE>;
241 samsung,pin-drv = <0>;
242 };
243
244 i2s1_bus: i2s1-bus {
245 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
246 "gpb0-4";
247 samsung,pin-function = <2>;
248 samsung,pin-pud = <PIN_PULL_NONE>;
249 samsung,pin-drv = <0>;
250 };
251
252 pcm1_bus: pcm1-bus {
253 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
254 "gpb0-4";
255 samsung,pin-function = <3>;
256 samsung,pin-pud = <PIN_PULL_NONE>;
257 samsung,pin-drv = <0>;
258 };
259
260 spdif1_bus: spdif1-bus {
261 samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2";
262 samsung,pin-function = <4>;
263 samsung,pin-pud = <PIN_PULL_NONE>;
264 samsung,pin-drv = <0>;
265 };
266
267 spi2_bus: spi2-bus {
268 samsung,pins = "gpb1-0", "gpb1-2", "gpb1-3";
269 samsung,pin-function = <2>;
270 samsung,pin-pud = <PIN_PULL_UP>;
271 samsung,pin-drv = <0>;
272 };
273
274 i2c0_hs_bus: i2c0-hs-bus {
275 samsung,pins = "gpb3-0", "gpb3-1";
276 samsung,pin-function = <2>;
277 samsung,pin-pud = <PIN_PULL_UP>;
278 samsung,pin-drv = <0>;
279 };
280
281 i2c1_hs_bus: i2c1-hs-bus {
282 samsung,pins = "gpb3-2", "gpb3-3";
283 samsung,pin-function = <2>;
284 samsung,pin-pud = <PIN_PULL_UP>;
285 samsung,pin-drv = <0>;
286 };
287
288 i2c2_hs_bus: i2c2-hs-bus {
289 samsung,pins = "gpb3-4", "gpb3-5";
290 samsung,pin-function = <2>;
291 samsung,pin-pud = <PIN_PULL_UP>;
292 samsung,pin-drv = <0>;
293 };
294
295 i2c3_hs_bus: i2c3-hs-bus {
296 samsung,pins = "gpb3-6", "gpb3-7";
297 samsung,pin-function = <2>;
298 samsung,pin-pud = <PIN_PULL_UP>;
299 samsung,pin-drv = <0>;
300 };
301
302 i2c4_bus: i2c4-bus {
303 samsung,pins = "gpb4-0", "gpb4-1";
304 samsung,pin-function = <2>;
305 samsung,pin-pud = <PIN_PULL_UP>;
306 samsung,pin-drv = <0>;
307 };
308
309 i2c5_bus: i2c5-bus {
310 samsung,pins = "gpb4-2", "gpb4-3";
311 samsung,pin-function = <2>;
312 samsung,pin-pud = <PIN_PULL_UP>;
313 samsung,pin-drv = <0>;
314 };
315
316 i2c6_bus: i2c6-bus {
317 samsung,pins = "gpb4-4", "gpb4-5";
318 samsung,pin-function = <2>;
319 samsung,pin-pud = <PIN_PULL_UP>;
320 samsung,pin-drv = <0>;
321 };
322
323 i2c7_bus: i2c7-bus {
324 samsung,pins = "gpb4-6", "gpb4-7";
325 samsung,pin-function = <2>;
326 samsung,pin-pud = <PIN_PULL_UP>;
327 samsung,pin-drv = <0>;
328 };
329
330 i2c8_bus: i2c8-bus {
331 samsung,pins = "gpb5-0", "gpb5-1";
332 samsung,pin-function = <2>;
333 samsung,pin-pud = <PIN_PULL_UP>;
334 samsung,pin-drv = <0>;
335 };
336
337 i2c9_bus: i2c9-bus {
338 samsung,pins = "gpb5-2", "gpb5-3";
339 samsung,pin-function = <2>;
340 samsung,pin-pud = <PIN_PULL_UP>;
341 samsung,pin-drv = <0>;
342 };
343
344 i2c10_bus: i2c10-bus {
345 samsung,pins = "gpb5-4", "gpb5-5";
346 samsung,pin-function = <2>;
347 samsung,pin-pud = <PIN_PULL_UP>;
348 samsung,pin-drv = <0>;
349 };
350
351 i2c11_bus: i2c11-bus {
352 samsung,pins = "gpb5-6", "gpb5-7";
353 samsung,pin-function = <2>;
354 samsung,pin-pud = <PIN_PULL_UP>;
355 samsung,pin-drv = <0>;
356 };
357
358 cam_gpio_a: cam-gpio-a {
359 samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3",
360 "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7",
361 "gpe1-0", "gpe1-1";
362 samsung,pin-function = <2>;
363 samsung,pin-pud = <PIN_PULL_NONE>;
364 samsung,pin-drv = <0>;
365 };
366
367 cam_gpio_b: cam-gpio-b {
368 samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3",
369 "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
370 samsung,pin-function = <3>;
371 samsung,pin-pud = <PIN_PULL_NONE>;
372 samsung,pin-drv = <0>;
373 };
374
375 cam_i2c1_bus: cam-i2c1-bus {
376 samsung,pins = "gpf0-2", "gpf0-3";
377 samsung,pin-function = <2>;
378 samsung,pin-pud = <PIN_PULL_UP>;
379 samsung,pin-drv = <0>;
380 };
381
382 cam_i2c0_bus: cam-i2c0-bus {
383 samsung,pins = "gpf0-0", "gpf0-1";
384 samsung,pin-function = <2>;
385 samsung,pin-pud = <PIN_PULL_UP>;
386 samsung,pin-drv = <0>;
387 };
388
389 cam_spi0_bus: cam-spi0-bus {
390 samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
391 samsung,pin-function = <2>;
392 samsung,pin-pud = <PIN_PULL_NONE>;
393 samsung,pin-drv = <0>;
394 };
395
396 cam_spi1_bus: cam-spi1-bus {
397 samsung,pins = "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7";
398 samsung,pin-function = <2>;
399 samsung,pin-pud = <PIN_PULL_NONE>;
400 samsung,pin-drv = <0>;
401 };
402};
403
404&pinctrl_1 {
405 gpc0: gpc0 {
406 gpio-controller;
407 #gpio-cells = <2>;
408
409 interrupt-controller;
410 #interrupt-cells = <2>;
411 };
412
413 gpc1: gpc1 {
414 gpio-controller;
415 #gpio-cells = <2>;
416
417 interrupt-controller;
418 #interrupt-cells = <2>;
419 };
420
421 gpc2: gpc2 {
422 gpio-controller;
423 #gpio-cells = <2>;
424
425 interrupt-controller;
426 #interrupt-cells = <2>;
427 };
428
429 gpc3: gpc3 {
430 gpio-controller;
431 #gpio-cells = <2>;
432
433 interrupt-controller;
434 #interrupt-cells = <2>;
435 };
436
437 gpc4: gpc4 {
438 gpio-controller;
439 #gpio-cells = <2>;
440
441 interrupt-controller;
442 #interrupt-cells = <2>;
443 };
444
445 sd0_clk: sd0-clk {
446 samsung,pins = "gpc0-0";
447 samsung,pin-function = <2>;
448 samsung,pin-pud = <PIN_PULL_NONE>;
449 samsung,pin-drv = <3>;
450 };
451
452 sd0_cmd: sd0-cmd {
453 samsung,pins = "gpc0-1";
454 samsung,pin-function = <2>;
455 samsung,pin-pud = <PIN_PULL_NONE>;
456 samsung,pin-drv = <3>;
457 };
458
459 sd0_bus1: sd0-bus-width1 {
460 samsung,pins = "gpc0-2";
461 samsung,pin-function = <2>;
462 samsung,pin-pud = <PIN_PULL_UP>;
463 samsung,pin-drv = <3>;
464 };
465
466 sd0_bus4: sd0-bus-width4 {
467 samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5";
468 samsung,pin-function = <2>;
469 samsung,pin-pud = <PIN_PULL_UP>;
470 samsung,pin-drv = <3>;
471 };
472
473 sd0_bus8: sd0-bus-width8 {
474 samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3";
475 samsung,pin-function = <2>;
476 samsung,pin-pud = <PIN_PULL_UP>;
477 samsung,pin-drv = <3>;
478 };
479
480 sd0_rdqs: sd0-rdqs {
481 samsung,pins = "gpc0-6";
482 samsung,pin-function = <2>;
483 samsung,pin-pud = <PIN_PULL_UP>;
484 samsung,pin-drv = <3>;
485 };
486
487 sd1_clk: sd1-clk {
488 samsung,pins = "gpc1-0";
489 samsung,pin-function = <2>;
490 samsung,pin-pud = <PIN_PULL_NONE>;
491 samsung,pin-drv = <3>;
492 };
493
494 sd1_cmd: sd1-cmd {
495 samsung,pins = "gpc1-1";
496 samsung,pin-function = <2>;
497 samsung,pin-pud = <PIN_PULL_NONE>;
498 samsung,pin-drv = <3>;
499 };
500
501 sd1_bus1: sd1-bus-width1 {
502 samsung,pins = "gpc1-2";
503 samsung,pin-function = <2>;
504 samsung,pin-pud = <PIN_PULL_UP>;
505 samsung,pin-drv = <3>;
506 };
507
508 sd1_bus4: sd1-bus-width4 {
509 samsung,pins = "gpc1-3", "gpc1-4", "gpc1-5";
510 samsung,pin-function = <2>;
511 samsung,pin-pud = <PIN_PULL_UP>;
512 samsung,pin-drv = <3>;
513 };
514
515 sd1_bus8: sd1-bus-width8 {
516 samsung,pins = "gpc4-0", "gpc4-1", "gpc4-2", "gpc4-3";
517 samsung,pin-function = <2>;
518 samsung,pin-pud = <PIN_PULL_UP>;
519 samsung,pin-drv = <3>;
520 };
521
522 sd2_clk: sd2-clk {
523 samsung,pins = "gpc2-0";
524 samsung,pin-function = <2>;
525 samsung,pin-pud = <PIN_PULL_NONE>;
526 samsung,pin-drv = <3>;
527 };
528
529 sd2_cmd: sd2-cmd {
530 samsung,pins = "gpc2-1";
531 samsung,pin-function = <2>;
532 samsung,pin-pud = <PIN_PULL_NONE>;
533 samsung,pin-drv = <3>;
534 };
535
536 sd2_cd: sd2-cd {
537 samsung,pins = "gpc2-2";
538 samsung,pin-function = <2>;
539 samsung,pin-pud = <PIN_PULL_UP>;
540 samsung,pin-drv = <3>;
541 };
542
543 sd2_bus1: sd2-bus-width1 {
544 samsung,pins = "gpc2-3";
545 samsung,pin-function = <2>;
546 samsung,pin-pud = <PIN_PULL_UP>;
547 samsung,pin-drv = <3>;
548 };
549
550 sd2_bus4: sd2-bus-width4 {
551 samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6";
552 samsung,pin-function = <2>;
553 samsung,pin-pud = <PIN_PULL_UP>;
554 samsung,pin-drv = <3>;
555 };
556};
557
558&pinctrl_2 {
559 gpz0: gpz0 {
560 gpio-controller;
561 #gpio-cells = <2>;
562
563 interrupt-controller;
564 #interrupt-cells = <2>;
565 };
566
567 gpz1: gpz1 {
568 gpio-controller;
569 #gpio-cells = <2>;
570
571 interrupt-controller;
572 #interrupt-cells = <2>;
573 };
574};
diff --git a/arch/arm/boot/dts/exynos5260-xyref5260.dts b/arch/arm/boot/dts/exynos5260-xyref5260.dts
new file mode 100644
index 000000000000..8c84ab27c19b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5260-xyref5260.dts
@@ -0,0 +1,103 @@
1/*
2 * SAMSUNG XYREF5260 board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/dts-v1/;
13#include "exynos5260.dtsi"
14
15/ {
16 model = "SAMSUNG XYREF5260 board based on EXYNOS5260";
17 compatible = "samsung,xyref5260", "samsung,exynos5260", "samsung,exynos5";
18
19 memory {
20 reg = <0x20000000 0x80000000>;
21 };
22
23 chosen {
24 bootargs = "console=ttySAC2,115200";
25 };
26
27 fin_pll: xxti {
28 compatible = "fixed-clock";
29 clock-frequency = <24000000>;
30 clock-output-names = "fin_pll";
31 #clock-cells = <0>;
32 };
33
34 xrtcxti: xrtcxti {
35 compatible = "fixed-clock";
36 clock-frequency = <32768>;
37 clock-output-names = "xrtcxti";
38 #clock-cells = <0>;
39 };
40};
41
42&pinctrl_0 {
43 hdmi_hpd_irq: hdmi-hpd-irq {
44 samsung,pins = "gpx3-7";
45 samsung,pin-function = <0>;
46 samsung,pin-pud = <1>;
47 samsung,pin-drv = <0>;
48 };
49};
50
51&uart0 {
52 status = "okay";
53};
54
55&uart1 {
56 status = "okay";
57};
58
59&uart2 {
60 status = "okay";
61};
62
63&uart3 {
64 status = "okay";
65};
66
67&mmc_0 {
68 status = "okay";
69 num-slots = <1>;
70 broken-cd;
71 bypass-smu;
72 supports-highspeed;
73 supports-hs200-mode; /* 200 Mhz */
74 card-detect-delay = <200>;
75 samsung,dw-mshc-ciu-div = <3>;
76 samsung,dw-mshc-sdr-timing = <0 4>;
77 samsung,dw-mshc-ddr-timing = <0 2>;
78 pinctrl-names = "default";
79 pinctrl-0 = <&sd0_rdqs &sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
80
81 slot@0 {
82 reg = <0>;
83 bus-width = <8>;
84 };
85};
86
87&mmc_2 {
88 status = "okay";
89 num-slots = <1>;
90 supports-highspeed;
91 card-detect-delay = <200>;
92 samsung,dw-mshc-ciu-div = <3>;
93 samsung,dw-mshc-sdr-timing = <2 3>;
94 samsung,dw-mshc-ddr-timing = <1 2>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
97
98 slot@0 {
99 reg = <0>;
100 bus-width = <4>;
101 disable-wp;
102 };
103};
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
new file mode 100644
index 000000000000..5398a60207ca
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -0,0 +1,304 @@
1/*
2 * SAMSUNG EXYNOS5260 SoC device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include "skeleton.dtsi"
13
14#include <dt-bindings/clock/exynos5260-clk.h>
15
16/ {
17 compatible = "samsung,exynos5260", "samsung,exynos5";
18 interrupt-parent = <&gic>;
19
20 aliases {
21 pinctrl0 = &pinctrl_0;
22 pinctrl1 = &pinctrl_1;
23 pinctrl2 = &pinctrl_2;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 cpu@0 {
31 device_type = "cpu";
32 compatible = "arm,cortex-a15";
33 reg = <0x0>;
34 cci-control-port = <&cci_control1>;
35 };
36
37 cpu@1 {
38 device_type = "cpu";
39 compatible = "arm,cortex-a15";
40 reg = <0x1>;
41 cci-control-port = <&cci_control1>;
42 };
43
44 cpu@100 {
45 device_type = "cpu";
46 compatible = "arm,cortex-a7";
47 reg = <0x100>;
48 cci-control-port = <&cci_control0>;
49 };
50
51 cpu@101 {
52 device_type = "cpu";
53 compatible = "arm,cortex-a7";
54 reg = <0x101>;
55 cci-control-port = <&cci_control0>;
56 };
57
58 cpu@102 {
59 device_type = "cpu";
60 compatible = "arm,cortex-a7";
61 reg = <0x102>;
62 cci-control-port = <&cci_control0>;
63 };
64
65 cpu@103 {
66 device_type = "cpu";
67 compatible = "arm,cortex-a7";
68 reg = <0x103>;
69 cci-control-port = <&cci_control0>;
70 };
71 };
72
73 soc: soc {
74 compatible = "simple-bus";
75 #address-cells = <1>;
76 #size-cells = <1>;
77 ranges;
78
79 clock_top: clock-controller@10010000 {
80 compatible = "samsung,exynos5260-clock-top";
81 reg = <0x10010000 0x10000>;
82 #clock-cells = <1>;
83 };
84
85 clock_peri: clock-controller@10200000 {
86 compatible = "samsung,exynos5260-clock-peri";
87 reg = <0x10200000 0x10000>;
88 #clock-cells = <1>;
89 };
90
91 clock_egl: clock-controller@10600000 {
92 compatible = "samsung,exynos5260-clock-egl";
93 reg = <0x10600000 0x10000>;
94 #clock-cells = <1>;
95 };
96
97 clock_kfc: clock-controller@10700000 {
98 compatible = "samsung,exynos5260-clock-kfc";
99 reg = <0x10700000 0x10000>;
100 #clock-cells = <1>;
101 };
102
103 clock_g2d: clock-controller@10A00000 {
104 compatible = "samsung,exynos5260-clock-g2d";
105 reg = <0x10A00000 0x10000>;
106 #clock-cells = <1>;
107 };
108
109 clock_mif: clock-controller@10CE0000 {
110 compatible = "samsung,exynos5260-clock-mif";
111 reg = <0x10CE0000 0x10000>;
112 #clock-cells = <1>;
113 };
114
115 clock_mfc: clock-controller@11090000 {
116 compatible = "samsung,exynos5260-clock-mfc";
117 reg = <0x11090000 0x10000>;
118 #clock-cells = <1>;
119 };
120
121 clock_g3d: clock-controller@11830000 {
122 compatible = "samsung,exynos5260-clock-g3d";
123 reg = <0x11830000 0x10000>;
124 #clock-cells = <1>;
125 };
126
127 clock_fsys: clock-controller@122E0000 {
128 compatible = "samsung,exynos5260-clock-fsys";
129 reg = <0x122E0000 0x10000>;
130 #clock-cells = <1>;
131 };
132
133 clock_aud: clock-controller@128C0000 {
134 compatible = "samsung,exynos5260-clock-aud";
135 reg = <0x128C0000 0x10000>;
136 #clock-cells = <1>;
137 };
138
139 clock_isp: clock-controller@133C0000 {
140 compatible = "samsung,exynos5260-clock-isp";
141 reg = <0x133C0000 0x10000>;
142 #clock-cells = <1>;
143 };
144
145 clock_gscl: clock-controller@13F00000 {
146 compatible = "samsung,exynos5260-clock-gscl";
147 reg = <0x13F00000 0x10000>;
148 #clock-cells = <1>;
149 };
150
151 clock_disp: clock-controller@14550000 {
152 compatible = "samsung,exynos5260-clock-disp";
153 reg = <0x14550000 0x10000>;
154 #clock-cells = <1>;
155 };
156
157 gic: interrupt-controller@10481000 {
158 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
159 #interrupt-cells = <3>;
160 #address-cells = <0>;
161 #size-cells = <0>;
162 interrupt-controller;
163 reg = <0x10481000 0x1000>,
164 <0x10482000 0x1000>,
165 <0x10484000 0x2000>,
166 <0x10486000 0x2000>;
167 interrupts = <1 9 0xf04>;
168 };
169
170 chipid: chipid@10000000 {
171 compatible = "samsung,exynos4210-chipid";
172 reg = <0x10000000 0x100>;
173 };
174
175 mct: mct@100B0000 {
176 compatible = "samsung,exynos4210-mct";
177 reg = <0x100B0000 0x1000>;
178 clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>;
179 clock-names = "fin_pll", "mct";
180 interrupts = <0 104 0>, <0 105 0>, <0 106 0>,
181 <0 107 0>, <0 122 0>, <0 123 0>,
182 <0 124 0>, <0 125 0>, <0 126 0>,
183 <0 127 0>, <0 128 0>, <0 129 0>;
184 };
185
186 cci: cci@10F00000 {
187 compatible = "arm,cci-400";
188 #address-cells = <1>;
189 #size-cells = <1>;
190 reg = <0x10F00000 0x1000>;
191 ranges = <0x0 0x10F00000 0x6000>;
192
193 cci_control0: slave-if@4000 {
194 compatible = "arm,cci-400-ctrl-if";
195 interface-type = "ace";
196 reg = <0x4000 0x1000>;
197 };
198
199 cci_control1: slave-if@5000 {
200 compatible = "arm,cci-400-ctrl-if";
201 interface-type = "ace";
202 reg = <0x5000 0x1000>;
203 };
204 };
205
206 pinctrl_0: pinctrl@11600000 {
207 compatible = "samsung,exynos5260-pinctrl";
208 reg = <0x11600000 0x1000>;
209 interrupts = <0 79 0>;
210
211 wakeup-interrupt-controller {
212 compatible = "samsung,exynos4210-wakeup-eint";
213 interrupt-parent = <&gic>;
214 interrupts = <0 32 0>;
215 };
216 };
217
218 pinctrl_1: pinctrl@12290000 {
219 compatible = "samsung,exynos5260-pinctrl";
220 reg = <0x12290000 0x1000>;
221 interrupts = <0 157 0>;
222 };
223
224 pinctrl_2: pinctrl@128B0000 {
225 compatible = "samsung,exynos5260-pinctrl";
226 reg = <0x128B0000 0x1000>;
227 interrupts = <0 243 0>;
228 };
229
230 uart0: serial@12C00000 {
231 compatible = "samsung,exynos4210-uart";
232 reg = <0x12C00000 0x100>;
233 interrupts = <0 146 0>;
234 clocks = <&clock_peri PERI_CLK_UART0>, <&clock_peri PERI_SCLK_UART0>;
235 clock-names = "uart", "clk_uart_baud0";
236 status = "disabled";
237 };
238
239 uart1: serial@12C10000 {
240 compatible = "samsung,exynos4210-uart";
241 reg = <0x12C10000 0x100>;
242 interrupts = <0 147 0>;
243 clocks = <&clock_peri PERI_CLK_UART1>, <&clock_peri PERI_SCLK_UART1>;
244 clock-names = "uart", "clk_uart_baud0";
245 status = "disabled";
246 };
247
248 uart2: serial@12C20000 {
249 compatible = "samsung,exynos4210-uart";
250 reg = <0x12C20000 0x100>;
251 interrupts = <0 148 0>;
252 clocks = <&clock_peri PERI_CLK_UART2>, <&clock_peri PERI_SCLK_UART2>;
253 clock-names = "uart", "clk_uart_baud0";
254 status = "disabled";
255 };
256
257 uart3: serial@12860000 {
258 compatible = "samsung,exynos4210-uart";
259 reg = <0x12860000 0x100>;
260 interrupts = <0 145 0>;
261 clocks = <&clock_aud AUD_CLK_AUD_UART>, <&clock_aud AUD_SCLK_AUD_UART>;
262 clock-names = "uart", "clk_uart_baud0";
263 status = "disabled";
264 };
265
266 mmc_0: mmc@12140000 {
267 compatible = "samsung,exynos5250-dw-mshc";
268 reg = <0x12140000 0x2000>;
269 interrupts = <0 156 0>;
270 #address-cells = <1>;
271 #size-cells = <0>;
272 clocks = <&clock_fsys FSYS_CLK_MMC0>, <&clock_top TOP_SCLK_MMC0>;
273 clock-names = "biu", "ciu";
274 fifo-depth = <64>;
275 status = "disabled";
276 };
277
278 mmc_1: mmc@12150000 {
279 compatible = "samsung,exynos5250-dw-mshc";
280 reg = <0x12150000 0x2000>;
281 interrupts = <0 158 0>;
282 #address-cells = <1>;
283 #size-cells = <0>;
284 clocks = <&clock_fsys FSYS_CLK_MMC1>, <&clock_top TOP_SCLK_MMC1>;
285 clock-names = "biu", "ciu";
286 fifo-depth = <64>;
287 status = "disabled";
288 };
289
290 mmc_2: mmc@12160000 {
291 compatible = "samsung,exynos5250-dw-mshc";
292 reg = <0x12160000 0x2000>;
293 interrupts = <0 159 0>;
294 #address-cells = <1>;
295 #size-cells = <0>;
296 clocks = <&clock_fsys FSYS_CLK_MMC2>, <&clock_top TOP_SCLK_MMC2>;
297 clock-names = "biu", "ciu";
298 fifo-depth = <64>;
299 status = "disabled";
300 };
301 };
302};
303
304#include "exynos5260-pinctrl.dtsi"
diff --git a/arch/arm/boot/dts/exynos5410-smdk5410.dts b/arch/arm/boot/dts/exynos5410-smdk5410.dts
new file mode 100644
index 000000000000..7275bbd6fc4b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5410-smdk5410.dts
@@ -0,0 +1,82 @@
1/*
2 * SAMSUNG SMDK5410 board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/dts-v1/;
13#include "exynos5410.dtsi"
14/ {
15 model = "Samsung SMDK5410 board based on EXYNOS5410";
16 compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";
17
18 memory {
19 reg = <0x40000000 0x80000000>;
20 };
21
22 chosen {
23 bootargs = "console=ttySAC2,115200";
24 };
25
26 fin_pll: xxti {
27 compatible = "fixed-clock";
28 clock-frequency = <24000000>;
29 clock-output-names = "fin_pll";
30 #clock-cells = <0>;
31 };
32
33 firmware@02037000 {
34 compatible = "samsung,secure-firmware";
35 reg = <0x02037000 0x1000>;
36 };
37
38};
39
40&mmc_0 {
41 status = "okay";
42 num-slots = <1>;
43 supports-highspeed;
44 broken-cd;
45 card-detect-delay = <200>;
46 samsung,dw-mshc-ciu-div = <3>;
47 samsung,dw-mshc-sdr-timing = <2 3>;
48 samsung,dw-mshc-ddr-timing = <1 2>;
49
50 slot@0 {
51 reg = <0>;
52 bus-width = <8>;
53 };
54};
55
56&mmc_2 {
57 status = "okay";
58 num-slots = <1>;
59 supports-highspeed;
60 card-detect-delay = <200>;
61 samsung,dw-mshc-ciu-div = <3>;
62 samsung,dw-mshc-sdr-timing = <2 3>;
63 samsung,dw-mshc-ddr-timing = <1 2>;
64
65 slot@0 {
66 reg = <0>;
67 bus-width = <4>;
68 disable-wp;
69 };
70};
71
72&uart0 {
73 status = "okay";
74};
75
76&uart1 {
77 status = "okay";
78};
79
80&uart2 {
81 status = "okay";
82};
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
new file mode 100644
index 000000000000..3839c26f467f
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -0,0 +1,206 @@
1/*
2 * SAMSUNG EXYNOS5410 SoC device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * SAMSUNG EXYNOS5410 SoC device nodes are listed in this file.
8 * EXYNOS5410 based board files can include this file and provide
9 * values for board specfic bindings.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include "skeleton.dtsi"
17#include <dt-bindings/clock/exynos5410.h>
18
19/ {
20 compatible = "samsung,exynos5410", "samsung,exynos5";
21 interrupt-parent = <&gic>;
22
23 cpus {
24 #address-cells = <1>;
25 #size-cells = <0>;
26
27 CPU0: cpu@0 {
28 device_type = "cpu";
29 compatible = "arm,cortex-a15";
30 reg = <0x0>;
31 };
32
33 CPU1: cpu@1 {
34 device_type = "cpu";
35 compatible = "arm,cortex-a15";
36 reg = <0x1>;
37 };
38
39 CPU2: cpu@2 {
40 device_type = "cpu";
41 compatible = "arm,cortex-a15";
42 reg = <0x2>;
43 };
44
45 CPU3: cpu@3 {
46 device_type = "cpu";
47 compatible = "arm,cortex-a15";
48 reg = <0x3>;
49 };
50 };
51
52 soc: soc {
53 compatible = "simple-bus";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges;
57
58 combiner: interrupt-controller@10440000 {
59 compatible = "samsung,exynos4210-combiner";
60 #interrupt-cells = <2>;
61 interrupt-controller;
62 samsung,combiner-nr = <32>;
63 reg = <0x10440000 0x1000>;
64 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
65 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
66 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
67 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
68 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
69 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
70 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
71 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
72 };
73
74 gic: interrupt-controller@10481000 {
75 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
76 #interrupt-cells = <3>;
77 interrupt-controller;
78 reg = <0x10481000 0x1000>,
79 <0x10482000 0x1000>,
80 <0x10484000 0x2000>,
81 <0x10486000 0x2000>;
82 interrupts = <1 9 0xf04>;
83 };
84
85 chipid@10000000 {
86 compatible = "samsung,exynos4210-chipid";
87 reg = <0x10000000 0x100>;
88 };
89
90 mct: mct@101C0000 {
91 compatible = "samsung,exynos4210-mct";
92 reg = <0x101C0000 0xB00>;
93 interrupt-parent = <&interrupt_map>;
94 interrupts = <0>, <1>, <2>, <3>,
95 <4>, <5>, <6>, <7>,
96 <8>, <9>, <10>, <11>;
97 clocks = <&fin_pll>, <&clock CLK_MCT>;
98 clock-names = "fin_pll", "mct";
99
100 interrupt_map: interrupt-map {
101 #interrupt-cells = <1>;
102 #address-cells = <0>;
103 #size-cells = <0>;
104 interrupt-map = <0 &combiner 23 3>,
105 <1 &combiner 23 4>,
106 <2 &combiner 25 2>,
107 <3 &combiner 25 3>,
108 <4 &gic 0 120 0>,
109 <5 &gic 0 121 0>,
110 <6 &gic 0 122 0>,
111 <7 &gic 0 123 0>,
112 <8 &gic 0 128 0>,
113 <9 &gic 0 129 0>,
114 <10 &gic 0 130 0>,
115 <11 &gic 0 131 0>;
116 };
117 };
118
119 sysram@02020000 {
120 compatible = "mmio-sram";
121 reg = <0x02020000 0x54000>;
122 #address-cells = <1>;
123 #size-cells = <1>;
124 ranges = <0 0x02020000 0x54000>;
125
126 smp-sysram@0 {
127 compatible = "samsung,exynos4210-sysram";
128 reg = <0x0 0x1000>;
129 };
130
131 smp-sysram@53000 {
132 compatible = "samsung,exynos4210-sysram-ns";
133 reg = <0x53000 0x1000>;
134 };
135 };
136
137 clock: clock-controller@10010000 {
138 compatible = "samsung,exynos5410-clock";
139 reg = <0x10010000 0x30000>;
140 #clock-cells = <1>;
141 };
142
143 mmc_0: mmc@12200000 {
144 compatible = "samsung,exynos5250-dw-mshc";
145 reg = <0x12200000 0x1000>;
146 interrupts = <0 75 0>;
147 #address-cells = <1>;
148 #size-cells = <0>;
149 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
150 clock-names = "biu", "ciu";
151 fifo-depth = <0x80>;
152 status = "disabled";
153 };
154
155 mmc_1: mmc@12210000 {
156 compatible = "samsung,exynos5250-dw-mshc";
157 reg = <0x12210000 0x1000>;
158 interrupts = <0 76 0>;
159 #address-cells = <1>;
160 #size-cells = <0>;
161 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
162 clock-names = "biu", "ciu";
163 fifo-depth = <0x80>;
164 status = "disabled";
165 };
166
167 mmc_2: mmc@12220000 {
168 compatible = "samsung,exynos5250-dw-mshc";
169 reg = <0x12220000 0x1000>;
170 interrupts = <0 77 0>;
171 #address-cells = <1>;
172 #size-cells = <0>;
173 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
174 clock-names = "biu", "ciu";
175 fifo-depth = <0x80>;
176 status = "disabled";
177 };
178
179 uart0: serial@12C00000 {
180 compatible = "samsung,exynos4210-uart";
181 reg = <0x12C00000 0x100>;
182 interrupts = <0 51 0>;
183 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
184 clock-names = "uart", "clk_uart_baud0";
185 status = "disabled";
186 };
187
188 uart1: serial@12C10000 {
189 compatible = "samsung,exynos4210-uart";
190 reg = <0x12C10000 0x100>;
191 interrupts = <0 52 0>;
192 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
193 clock-names = "uart", "clk_uart_baud0";
194 status = "disabled";
195 };
196
197 uart2: serial@12C20000 {
198 compatible = "samsung,exynos4210-uart";
199 reg = <0x12C20000 0x100>;
200 interrupts = <0 53 0>;
201 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
202 clock-names = "uart", "clk_uart_baud0";
203 status = "disabled";
204 };
205 };
206};
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 6ee8149fd5c4..434fd9d3e09d 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -26,6 +26,11 @@
26 bootargs = "console=ttySAC3,115200"; 26 bootargs = "console=ttySAC3,115200";
27 }; 27 };
28 28
29 firmware@02073000 {
30 compatible = "samsung,secure-firmware";
31 reg = <0x02073000 0x1000>;
32 };
33
29 fixed-rate-clocks { 34 fixed-rate-clocks {
30 oscclk { 35 oscclk {
31 compatible = "samsung,exynos5420-oscclk"; 36 compatible = "samsung,exynos5420-oscclk";
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 29f64de95ebf..1c5b8f9f4a36 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -231,11 +231,11 @@
231 ddc = <&i2c_2>; 231 ddc = <&i2c_2>;
232}; 232};
233 233
234&usbdrd3_0 { 234&usbdrd_phy0 {
235 vbus-supply = <&usb300_vbus_reg>; 235 vbus-supply = <&usb300_vbus_reg>;
236}; 236};
237 237
238&usbdrd3_1 { 238&usbdrd_phy1 {
239 vbus-supply = <&usb301_vbus_reg>; 239 vbus-supply = <&usb301_vbus_reg>;
240}; 240};
241 241
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 84f77c2fe4d4..ae3a17c791f6 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -176,7 +176,7 @@
176 clock-names = "i2c"; 176 clock-names = "i2c";
177 }; 177 };
178 178
179 watchdog { 179 watchdog@110000 {
180 compatible = "samsung,s3c2410-wdt"; 180 compatible = "samsung,s3c2410-wdt";
181 reg = <0x110000 0x1000>; 181 reg = <0x110000 0x1000>;
182 interrupts = <0 1 0>; 182 interrupts = <0 1 0>;
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
new file mode 100644
index 000000000000..f3af2079a063
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -0,0 +1,253 @@
1/*
2 * Google Peach Pi Rev 10+ board device tree source
3 *
4 * Copyright (c) 2014 Google, Inc
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11/dts-v1/;
12#include <dt-bindings/input/input.h>
13#include <dt-bindings/gpio/gpio.h>
14#include "exynos5800.dtsi"
15
16/ {
17 model = "Google Peach Pi Rev 10+";
18
19 compatible = "google,pi-rev16",
20 "google,pi-rev15", "google,pi-rev14",
21 "google,pi-rev13", "google,pi-rev12",
22 "google,pi-rev11", "google,pi-rev10",
23 "google,pi", "google,peach", "samsung,exynos5800",
24 "samsung,exynos5";
25
26 memory {
27 reg = <0x20000000 0x80000000>;
28 };
29
30 fixed-rate-clocks {
31 oscclk {
32 compatible = "samsung,exynos5420-oscclk";
33 clock-frequency = <24000000>;
34 };
35 };
36
37 gpio-keys {
38 compatible = "gpio-keys";
39
40 pinctrl-names = "default";
41 pinctrl-0 = <&power_key_irq>;
42
43 power {
44 label = "Power";
45 gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
46 linux,code = <KEY_POWER>;
47 gpio-key,wakeup;
48 };
49 };
50
51 backlight {
52 compatible = "pwm-backlight";
53 pwms = <&pwm 0 1000000 0>;
54 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
55 default-brightness-level = <7>;
56 pinctrl-0 = <&pwm0_out>;
57 pinctrl-names = "default";
58 };
59
60 usb300_vbus_reg: regulator-usb300 {
61 compatible = "regulator-fixed";
62 regulator-name = "P5.0V_USB3CON0";
63 regulator-min-microvolt = <5000000>;
64 regulator-max-microvolt = <5000000>;
65 gpio = <&gph0 0 0>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&usb300_vbus_en>;
68 enable-active-high;
69 };
70
71 usb301_vbus_reg: regulator-usb301 {
72 compatible = "regulator-fixed";
73 regulator-name = "P5.0V_USB3CON1";
74 regulator-min-microvolt = <5000000>;
75 regulator-max-microvolt = <5000000>;
76 gpio = <&gph0 1 0>;
77 pinctrl-names = "default";
78 pinctrl-0 = <&usb301_vbus_en>;
79 enable-active-high;
80 };
81};
82
83&pinctrl_0 {
84 tpm_irq: tpm-irq {
85 samsung,pins = "gpx1-0";
86 samsung,pin-function = <0>;
87 samsung,pin-pud = <0>;
88 samsung,pin-drv = <0>;
89 };
90
91 power_key_irq: power-key-irq {
92 samsung,pins = "gpx1-2";
93 samsung,pin-function = <0>;
94 samsung,pin-pud = <0>;
95 samsung,pin-drv = <0>;
96 };
97
98 dp_hpd_gpio: dp_hpd_gpio {
99 samsung,pins = "gpx2-6";
100 samsung,pin-function = <0>;
101 samsung,pin-pud = <3>;
102 samsung,pin-drv = <0>;
103 };
104
105 hdmi_hpd_irq: hdmi-hpd-irq {
106 samsung,pins = "gpx3-7";
107 samsung,pin-function = <0>;
108 samsung,pin-pud = <1>;
109 samsung,pin-drv = <0>;
110 };
111};
112
113&pinctrl_3 {
114 usb300_vbus_en: usb300-vbus-en {
115 samsung,pins = "gph0-0";
116 samsung,pin-function = <1>;
117 samsung,pin-pud = <0>;
118 samsung,pin-drv = <0>;
119 };
120
121 usb301_vbus_en: usb301-vbus-en {
122 samsung,pins = "gph0-1";
123 samsung,pin-function = <1>;
124 samsung,pin-pud = <0>;
125 samsung,pin-drv = <0>;
126 };
127};
128
129&rtc {
130 status = "okay";
131};
132
133&uart_3 {
134 status = "okay";
135};
136
137&mmc_0 {
138 status = "okay";
139 num-slots = <1>;
140 broken-cd;
141 caps2-mmc-hs200-1_8v;
142 supports-highspeed;
143 non-removable;
144 card-detect-delay = <200>;
145 clock-frequency = <400000000>;
146 samsung,dw-mshc-ciu-div = <3>;
147 samsung,dw-mshc-sdr-timing = <0 4>;
148 samsung,dw-mshc-ddr-timing = <0 2>;
149 pinctrl-names = "default";
150 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
151
152 slot@0 {
153 reg = <0>;
154 bus-width = <8>;
155 };
156};
157
158&mmc_2 {
159 status = "okay";
160 num-slots = <1>;
161 supports-highspeed;
162 card-detect-delay = <200>;
163 clock-frequency = <400000000>;
164 samsung,dw-mshc-ciu-div = <3>;
165 samsung,dw-mshc-sdr-timing = <2 3>;
166 samsung,dw-mshc-ddr-timing = <1 2>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
169
170 slot@0 {
171 reg = <0>;
172 bus-width = <4>;
173 };
174};
175
176&dp {
177 status = "okay";
178 pinctrl-names = "default";
179 pinctrl-0 = <&dp_hpd_gpio>;
180 samsung,color-space = <0>;
181 samsung,dynamic-range = <0>;
182 samsung,ycbcr-coeff = <0>;
183 samsung,color-depth = <1>;
184 samsung,link-rate = <0x0a>;
185 samsung,lane-count = <2>;
186 samsung,hpd-gpio = <&gpx2 6 0>;
187
188 display-timings {
189 native-mode = <&timing1>;
190
191 timing1: timing@1 {
192 clock-frequency = <150660000>;
193 hactive = <1920>;
194 vactive = <1080>;
195 hfront-porch = <60>;
196 hback-porch = <172>;
197 hsync-len = <80>;
198 vback-porch = <25>;
199 vfront-porch = <10>;
200 vsync-len = <10>;
201 };
202 };
203};
204
205&fimd {
206 status = "okay";
207 samsung,invert-vclk;
208};
209
210&hsi2c_9 {
211 status = "okay";
212 clock-frequency = <400000>;
213
214 tpm@20 {
215 compatible = "infineon,slb9645tt";
216 reg = <0x20>;
217 /* Unused irq; but still need to configure the pins */
218 pinctrl-names = "default";
219 pinctrl-0 = <&tpm_irq>;
220 };
221};
222
223&i2c_2 {
224 status = "okay";
225 samsung,i2c-sda-delay = <100>;
226 samsung,i2c-max-bus-freq = <66000>;
227 samsung,i2c-slave-addr = <0x50>;
228};
229
230&hdmi {
231 status = "okay";
232 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&hdmi_hpd_irq>;
235 ddc = <&i2c_2>;
236};
237
238&usbdrd_phy0 {
239 vbus-supply = <&usb300_vbus_reg>;
240};
241
242&usbdrd_phy1 {
243 vbus-supply = <&usb301_vbus_reg>;
244};
245
246/*
247 * Use longest HW watchdog in SoC (32 seconds) since the hardware
248 * watchdog provides no debugging information (compared to soft/hard
249 * lockup detectors) and so should be last resort.
250 */
251&watchdog {
252 timeout-sec = <32>;
253};
diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi
new file mode 100644
index 000000000000..c0bb3563cac1
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5800.dtsi
@@ -0,0 +1,28 @@
1/*
2 * SAMSUNG EXYNOS5800 SoC device tree source
3 *
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * SAMSUNG EXYNOS5800 SoC device nodes are listed in this file.
8 * EXYNOS5800 based board files can include this file and provide
9 * values for board specfic bindings.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include "exynos5420.dtsi"
17
18/ {
19 compatible = "samsung,exynos5800", "samsung,exynos5";
20};
21
22&clock {
23 compatible = "samsung,exynos5800-clock";
24};
25
26&mfc {
27 compatible = "samsung,mfc-v8";
28};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-07 19:35:12 -0500