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authorVenu Byravarasu <vbyravarasu@nvidia.com>2013-05-16 10:12:56 -0400
committerStephen Warren <swarren@nvidia.com>2013-05-17 18:22:05 -0400
commit9dffe3be3f321581c4510f2fa2e217b18c703bcd (patch)
tree671d71489dad5f1d1868f68a6eee654be4fa16d9 /arch/arm/boot
parentd400f209b4afe4a196baac276128eccac6a11b31 (diff)
ARM: tegra: modify ULPI reset GPIO properties
1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active low nature of the GPIO. 2. Placed USB PHY DT node immediately below the EHCI controller DT nodes and corrected reg value in the name of USB PHY DT node. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/tegra20-colibri-512.dtsi6
-rw-r--r--arch/arm/boot/dts/tegra20-harmony.dts10
-rw-r--r--arch/arm/boot/dts/tegra20-paz00.dts10
-rw-r--r--arch/arm/boot/dts/tegra20-seaboard.dts10
-rw-r--r--arch/arm/boot/dts/tegra20-trimslice.dts10
-rw-r--r--arch/arm/boot/dts/tegra20-ventana.dts10
6 files changed, 30 insertions, 26 deletions
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index a573b94b7c93..c12af78e479c 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -449,7 +449,11 @@
449 449
450 usb@c5004000 { 450 usb@c5004000 {
451 status = "okay"; 451 status = "okay";
452 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ 452 nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */
453 };
454
455 usb-phy@c5004000 {
456 nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */
453 }; 457 };
454 458
455 sdhci@c8000600 { 459 sdhci@c8000600 {
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index e7d5de4e00b9..e84f3f6a5392 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -430,15 +430,15 @@
430 430
431 usb@c5004000 { 431 usb@c5004000 {
432 status = "okay"; 432 status = "okay";
433 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ 433 nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */
434 }; 434 };
435 435
436 usb@c5008000 { 436 usb-phy@c5004000 {
437 status = "okay"; 437 nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */
438 }; 438 };
439 439
440 usb-phy@c5004400 { 440 usb@c5008000 {
441 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ 441 status = "okay";
442 }; 442 };
443 443
444 sdhci@c8000200 { 444 sdhci@c8000200 {
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index e3e0c9977df4..e9ac2a991307 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -429,15 +429,15 @@
429 429
430 usb@c5004000 { 430 usb@c5004000 {
431 status = "okay"; 431 status = "okay";
432 nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ 432 nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */
433 }; 433 };
434 434
435 usb@c5008000 { 435 usb-phy@c5004000 {
436 status = "okay"; 436 nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */
437 }; 437 };
438 438
439 usb-phy@c5004400 { 439 usb@c5008000 {
440 nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ 440 status = "okay";
441 }; 441 };
442 442
443 sdhci@c8000000 { 443 sdhci@c8000000 {
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index cee4c34010fe..9dd4f8ee4f4a 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -571,15 +571,15 @@
571 571
572 usb@c5004000 { 572 usb@c5004000 {
573 status = "okay"; 573 status = "okay";
574 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ 574 nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */
575 }; 575 };
576 576
577 usb@c5008000 { 577 usb-phy@c5004000 {
578 status = "okay"; 578 nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */
579 }; 579 };
580 580
581 usb-phy@c5004400 { 581 usb@c5008000 {
582 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ 582 status = "okay";
583 }; 583 };
584 584
585 sdhci@c8000000 { 585 sdhci@c8000000 {
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 9cc78a15d739..fd7afd6b8306 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -316,15 +316,15 @@
316 316
317 usb@c5004000 { 317 usb@c5004000 {
318 status = "okay"; 318 status = "okay";
319 nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ 319 nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */
320 }; 320 };
321 321
322 usb@c5008000 { 322 usb-phy@c5004000 {
323 status = "okay"; 323 nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */
324 }; 324 };
325 325
326 usb-phy@c5004400 { 326 usb@c5008000 {
327 nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ 327 status = "okay";
328 }; 328 };
329 329
330 sdhci@c8000000 { 330 sdhci@c8000000 {
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index dd38f1f03834..a75a0e78523f 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -507,15 +507,15 @@
507 507
508 usb@c5004000 { 508 usb@c5004000 {
509 status = "okay"; 509 status = "okay";
510 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ 510 nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */
511 }; 511 };
512 512
513 usb@c5008000 { 513 usb-phy@c5004000 {
514 status = "okay"; 514 nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */
515 }; 515 };
516 516
517 usb-phy@c5004400 { 517 usb@c5008000 {
518 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ 518 status = "okay";
519 }; 519 };
520 520
521 sdhci@c8000000 { 521 sdhci@c8000000 {