Merge remote-tracking branch 'linaro/clk-next' into clk-next

5 files changed, 8 insertions, 3 deletions

diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi
index 9b186ac06c8b..0c30ca2dd152 100644
--- a/arch/arm/boot/dts/cros5250-common.dtsi
+++ b/arch/arm/boot/dts/cros5250-common.dtsi
@@ -48,6 +48,7 @@
                         pinctrl-0 = <&max77686_irq>;
                         wakeup-source;
                         reg = <0x09>;
+                        #clock-cells = <1>;
 
                         voltage-regulators {
                                 ldo1_reg: LDO1 {
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 46c678ee119c..8d337cc8f4e6 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -119,6 +119,7 @@
                 max77686: pmic@09 {
                         compatible = "maxim,max77686";
                         reg = <0x09>;
+                        #clock-cells = <1>;
 
                         voltage-regulators {
                                 ldo1_reg: LDO1 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index fb7b9ae5f399..c21a8b916bf1 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -139,6 +139,7 @@
                         interrupt-parent = <&gpx0>;
                         interrupts = <7 0>;
                         reg = <0x09>;
+                        #clock-cells = <1>;
 
                         voltage-regulators {
                                 ldo1_reg: ldo1 {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9db5047812f3..c70843fe1e28 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -88,6 +88,8 @@
                 compatible = "samsung,exynos5250-audss-clock";
                 reg = <0x03810000 0x0C>;
                 #clock-cells = <1>;
+                clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>;
+                clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
         };
 
         timer {
@@ -559,7 +561,7 @@
                         compatible = "arm,pl330", "arm,primecell";
                         reg = <0x10800000 0x1000>;
                         interrupts = <0 33 0>;
-                        clocks = <&clock 271>;
+                        clocks = <&clock 346>;
                         clock-names = "apb_pclk";
                         #dma-cells = <1>;
                         #dma-channels = <8>;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06cb3d3a..25a1120d88a5 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -76,8 +76,8 @@
                 compatible = "samsung,exynos5420-audss-clock";
                 reg = <0x03810000 0x0C>;
                 #clock-cells = <1>;
-                clocks = <&clock 148>;
-                clock-names = "sclk_audio";
+                clocks = <&clock 1>, <&clock 5>, <&clock 148>, <&clock 149>;
+                clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
         };
 
         codec@11000000 {