arm/dt: tegra devicetree support

Everything required to populate NVIDIA Tegra devices from the device
tree.  This patch adds a new DT_MACHINE_DESC() which matches against
a tegra20 device tree.  So far it only registers the on-chip devices,
but it will be refined in follow on patches to configure clocks and
pin IO from the device tree also.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

3 files changed, 237 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
new file mode 100644
index 000000000000..4c053340ce33
--- /dev/null
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -0,0 +1,70 @@
+/dts-v1/;
+
+/memreserve/ 0x1c000000 0x04000000;
+/include/ "tegra20.dtsi"
+
+/ {
+        model = "NVIDIA Tegra2 Harmony evaluation board";
+        compatible = "nvidia,harmony", "nvidia,tegra20";
+
+        chosen {
+                bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk0p2 rw rootwait";
+        };
+
+        memory@0 {
+                reg = < 0x00000000 0x40000000 >;
+        };
+
+        i2c@7000c000 {
+                clock-frequency = <400000>;
+
+                codec: wm8903@1a {
+                        compatible = "wlf,wm8903";
+                        reg = <0x1a>;
+                        interrupts = < 347 >;
+
+                        gpio-controller;
+                        #gpio-cells = <2>;
+
+                        /* 0x8000 = Not configured */
+                        gpio-cfg = < 0x8000 0x8000 0 0x8000 0x8000 >;
+                };
+        };
+
+        i2c@7000c400 {
+                clock-frequency = <400000>;
+        };
+
+        i2c@7000c500 {
+                clock-frequency = <400000>;
+        };
+
+        i2c@7000d000 {
+                clock-frequency = <400000>;
+        };
+
+        sound {
+                compatible = "nvidia,harmony-sound", "nvidia,tegra-wm8903";
+
+                spkr-en-gpios = <&codec 2 0>;
+                hp-det-gpios = <&gpio 178 0>;
+                int-mic-en-gpios = <&gpio 184 0>;
+                ext-mic-en-gpios = <&gpio 185 0>;
+        };
+
+        serial@70006300 {
+                clock-frequency = < 216000000 >;
+        };
+
+        sdhci@c8000200 {
+                gpios = <&gpio 69 0>, /* cd, gpio PI5 */
+                        <&gpio 57 0>, /* wp, gpio PH1 */
+                        <&gpio 155 0>; /* power, gpio PT3 */
+        };
+
+        sdhci@c8000600 {
+                gpios = <&gpio 58 0>, /* cd, gpio PH2 */
+                        <&gpio 59 0>, /* wp, gpio PH3 */
+                        <&gpio 70 0>; /* power, gpio PI6 */
+        };
+};
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
new file mode 100644
index 000000000000..1940cae00748
--- /dev/null
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+
+/memreserve/ 0x1c000000 0x04000000;
+/include/ "tegra20.dtsi"
+
+/ {
+        model = "NVIDIA Seaboard";
+        compatible = "nvidia,seaboard", "nvidia,tegra20";
+
+        chosen {
+                bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
+        };
+
+        memory {
+                device_type = "memory";
+                reg = < 0x00000000 0x40000000 >;
+        };
+
+        serial@70006300 {
+                clock-frequency = < 216000000 >;
+        };
+
+        sdhci@c8000400 {
+                gpios = <&gpio 69 0>, /* cd, gpio PI5 */
+                        <&gpio 57 0>, /* wp, gpio PH1 */
+                        <&gpio 70 0>; /* power, gpio PI6 */
+        };
+};
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
new file mode 100644
index 000000000000..5727595cde61
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -0,0 +1,139 @@
+/include/ "skeleton.dtsi"
+
+/ {
+        compatible = "nvidia,tegra20";
+        interrupt-parent = <&intc>;
+
+        intc: interrupt-controller@50041000 {
+                compatible = "nvidia,tegra20-gic";
+                interrupt-controller;
+                #interrupt-cells = <1>;
+                reg = < 0x50041000 0x1000 >,
+                      < 0x50040100 0x0100 >;
+        };
+
+        i2c@7000c000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "nvidia,tegra20-i2c";
+                reg = <0x7000C000 0x100>;
+                interrupts = < 70 >;
+        };
+
+        i2c@7000c400 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "nvidia,tegra20-i2c";
+                reg = <0x7000C400 0x100>;
+                interrupts = < 116 >;
+        };
+
+        i2c@7000c500 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "nvidia,tegra20-i2c";
+                reg = <0x7000C500 0x100>;
+                interrupts = < 124 >;
+        };
+
+        i2c@7000d000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "nvidia,tegra20-i2c";
+                reg = <0x7000D000 0x200>;
+                interrupts = < 85 >;
+        };
+
+        i2s@70002800 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "nvidia,tegra20-i2s";
+                reg = <0x70002800 0x200>;
+                interrupts = < 45 >;
+                dma-channel = < 2 >;
+        };
+
+        i2s@70002a00 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "nvidia,tegra20-i2s";
+                reg = <0x70002a00 0x200>;
+                interrupts = < 35 >;
+                dma-channel = < 1 >;
+        };
+
+        das@70000c00 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "nvidia,tegra20-das";
+                reg = <0x70000c00 0x80>;
+        };
+
+        gpio: gpio@6000d000 {
+                compatible = "nvidia,tegra20-gpio";
+                reg = < 0x6000d000 0x1000 >;
+                interrupts = < 64 65 66 67 87 119 121 >;
+                #gpio-cells = <2>;
+                gpio-controller;
+        };
+
+        serial@70006000 {
+                compatible = "nvidia,tegra20-uart";
+                reg = <0x70006000 0x40>;
+                reg-shift = <2>;
+                interrupts = < 68 >;
+        };
+
+        serial@70006040 {
+                compatible = "nvidia,tegra20-uart";
+                reg = <0x70006040 0x40>;
+                reg-shift = <2>;
+                interrupts = < 69 >;
+        };
+
+        serial@70006200 {
+                compatible = "nvidia,tegra20-uart";
+                reg = <0x70006200 0x100>;
+                reg-shift = <2>;
+                interrupts = < 78 >;
+        };
+
+        serial@70006300 {
+                compatible = "nvidia,tegra20-uart";
+                reg = <0x70006300 0x100>;
+                reg-shift = <2>;
+                interrupts = < 122 >;
+        };
+
+        serial@70006400 {
+                compatible = "nvidia,tegra20-uart";
+                reg = <0x70006400 0x100>;
+                reg-shift = <2>;
+                interrupts = < 123 >;
+        };
+
+        sdhci@c8000000 {
+                compatible = "nvidia,tegra20-sdhci";
+                reg = <0xc8000000 0x200>;
+                interrupts = < 46 >;
+        };
+
+        sdhci@c8000200 {
+                compatible = "nvidia,tegra20-sdhci";
+                reg = <0xc8000200 0x200>;
+                interrupts = < 47 >;
+        };
+
+        sdhci@c8000400 {
+                compatible = "nvidia,tegra20-sdhci";
+                reg = <0xc8000400 0x200>;
+                interrupts = < 51 >;
+        };
+
+        sdhci@c8000600 {
+                compatible = "nvidia,tegra20-sdhci";
+                reg = <0xc8000600 0x200>;
+                interrupts = < 63 >;
+        };
+};
+