diff options
author | Dave Martin <dave.martin@linaro.org> | 2011-06-14 09:20:44 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-06-21 06:33:20 -0400 |
commit | 946a105e16651c35e9cc670bff23812761f1ad35 (patch) | |
tree | cc5c434db14553737808d7b86bb2d6938b06ca53 /arch/arm/boot | |
parent | 573619d165b85152eeddd3b3871002c48cd94e42 (diff) |
ARM: 6961/1: zImage: Add build-time check for correctly-sized proc_type entries
It is easy to mis-maintain the proc_types table such that the
entries become wrongly-sized and misaligned when the kernel is
built in Thumb-2.
This patch adds an assembly-time check which will turn most common
size/alignment mistakes in this table into build failures, to avoid
having to debug the boot-time kernel hang which would happen if the
resulting kernel were actually booted.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/compressed/head.S | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 942fad97e447..940b20178107 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
@@ -597,6 +597,8 @@ __common_mmu_cache_on: | |||
597 | sub pc, lr, r0, lsr #32 @ properly flush pipeline | 597 | sub pc, lr, r0, lsr #32 @ properly flush pipeline |
598 | #endif | 598 | #endif |
599 | 599 | ||
600 | #define PROC_ENTRY_SIZE (4*5) | ||
601 | |||
600 | /* | 602 | /* |
601 | * Here follow the relocatable cache support functions for the | 603 | * Here follow the relocatable cache support functions for the |
602 | * various processors. This is a generic hook for locating an | 604 | * various processors. This is a generic hook for locating an |
@@ -624,7 +626,7 @@ call_cache_fn: adr r12, proc_types | |||
624 | ARM( addeq pc, r12, r3 ) @ call cache function | 626 | ARM( addeq pc, r12, r3 ) @ call cache function |
625 | THUMB( addeq r12, r3 ) | 627 | THUMB( addeq r12, r3 ) |
626 | THUMB( moveq pc, r12 ) @ call cache function | 628 | THUMB( moveq pc, r12 ) @ call cache function |
627 | add r12, r12, #4*5 | 629 | add r12, r12, #PROC_ENTRY_SIZE |
628 | b 1b | 630 | b 1b |
629 | 631 | ||
630 | /* | 632 | /* |
@@ -794,6 +796,16 @@ proc_types: | |||
794 | 796 | ||
795 | .size proc_types, . - proc_types | 797 | .size proc_types, . - proc_types |
796 | 798 | ||
799 | /* | ||
800 | * If you get a "non-constant expression in ".if" statement" | ||
801 | * error from the assembler on this line, check that you have | ||
802 | * not accidentally written a "b" instruction where you should | ||
803 | * have written W(b). | ||
804 | */ | ||
805 | .if (. - proc_types) % PROC_ENTRY_SIZE != 0 | ||
806 | .error "The size of one or more proc_types entries is wrong." | ||
807 | .endif | ||
808 | |||
797 | /* | 809 | /* |
798 | * Turn off the Cache and MMU. ARMv3 does not support | 810 | * Turn off the Cache and MMU. ARMv3 does not support |
799 | * reading the control register, but ARMv4 does. | 811 | * reading the control register, but ARMv4 does. |