ARM: CSR: add rtc i/o bridge interface for SiRFprimaII

The module is a bridge between the RTC clock domain and the CPU interface
clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through
this module.

Signed-off-by: Zhiwu Song <zhiwu.song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/prima2-cb.dts b/arch/arm/boot/dts/prima2-cb.dts
index af86931bdcc6..17b6737c4ee5 100644
--- a/arch/arm/boot/dts/prima2-cb.dts
+++ b/arch/arm/boot/dts/prima2-cb.dts
@@ -363,7 +363,7 @@
                 };
 
                 rtc-iobg {
-                        compatible = "sirf,prima2-rtciobg", "simple-bus";
+                        compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus";
                         #address-cells = <1>;
                         #size-cells = <1>;
                         reg = <0x80030000 0x10000>;